1/*
2** ###################################################################
3**     Processors:          MIMX9352CVUXK_cm33
4**                          MIMX9352DVUXM_cm33
5**
6**     Compiler:            IAR ANSI C/C++ Compiler for ARM
7**     Reference manual:    IMX93RM, Internal, November. 2021
8**     Version:             rev. 1.0, 2021-11-16
9**     Build:               b220830
10**
11**     Abstract:
12**         Linker file for the IAR ANSI C/C++ Compiler for ARM
13**
14**     Copyright 2016 Freescale Semiconductor, Inc.
15**     Copyright 2016-2022 NXP
16**     All rights reserved.
17**
18**     SPDX-License-Identifier: BSD-3-Clause
19**
20**     http:                 www.nxp.com
21**     mail:                 support@nxp.com
22**
23** ###################################################################
24*/
25
26
27define symbol __ram_vector_table_size__ =  isdefinedsymbol(__ram_vector_table__) ? 0x00000478 : 0;
28define symbol __ram_vector_table_offset__ =  isdefinedsymbol(__ram_vector_table__) ? 0x00000477 : 0;
29
30define symbol m_interrupts_start       = 0x0FFE0000;
31define symbol m_interrupts_end         = 0x0FFE0477;
32
33define symbol m_text_start             = 0x0FFE0478;
34define symbol m_text_end               = 0x0FFFFFFF;
35
36define symbol m_m33_suspend_ram_start  = 0x20000000;
37define symbol m_m33_suspend_ram_end    = 0x20001FFF;
38
39define symbol m_a55_suspend_ram_start  = 0x20002000;
40define symbol m_a55_suspend_ram_end    = 0x20002FFF;
41
42define symbol m_interrupts_ram_start   = 0x20003000;
43define symbol m_interrupts_ram_end     = 0x20003000 + __ram_vector_table_offset__;
44
45define symbol m_data_start             = m_interrupts_ram_start + __ram_vector_table_size__;
46define symbol m_data_end               = 0x2001FFFF;
47
48/* Sizes */
49if (isdefinedsymbol(__stack_size__)) {
50  define symbol __size_cstack__        = __stack_size__;
51} else {
52  define symbol __size_cstack__        = 0x0400;
53}
54
55if (isdefinedsymbol(__heap_size__)) {
56  define symbol __size_heap__          = __heap_size__;
57} else {
58  define symbol __size_heap__          = 0x0400;
59}
60
61define exported symbol __VECTOR_TABLE  = m_interrupts_start;
62define exported symbol __VECTOR_RAM    = isdefinedsymbol(__ram_vector_table__) ? m_interrupts_ram_start : m_interrupts_start;
63define exported symbol __RAM_VECTOR_TABLE_SIZE = __ram_vector_table_size__;
64
65define memory mem with size = 4G;
66define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
67                          | mem:[from m_text_start to m_text_end];
68define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
69define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
70define region m_interrupts_ram_region = mem:[from m_interrupts_ram_start to m_interrupts_ram_end];
71define region M33_SUSPEND_region = mem:[from m_m33_suspend_ram_start to m_m33_suspend_ram_end];
72define region A55_SUSPEND_region = mem:[from m_a55_suspend_ram_start to m_a55_suspend_ram_end];
73
74define block CSTACK    with alignment = 8, size = __size_cstack__   { };
75define block HEAP      with alignment = 8, size = __size_heap__     { };
76define block RW        { readwrite };
77define block ZI        { zi };
78
79initialize by copy { readwrite, section .textrw };
80do not initialize  { section .noinit, section M33SuspendRam, section A55SuspendRam };
81
82keep{section .resource_table};
83
84place at address mem: m_interrupts_start    { readonly section .intvec };
85".resource_table": place at address mem: m_text_start {section .resource_table};
86place in TEXT_region                        { readonly };
87place in DATA_region                        { block RW };
88place in DATA_region                        { block ZI };
89place in DATA_region                        { last block HEAP };
90place in CSTACK_region                      { block CSTACK };
91place in m_interrupts_ram_region            { section m_interrupts_ram };
92place in M33_SUSPEND_region                 { section M33SuspendRam };
93place in A55_SUSPEND_region                 { section A55SuspendRam };
94