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Searched refs:Set (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/include/
DClock_Ip_Private.h292 intOscSetCallback Set; member
306 extOscSetCallback Set; member
317 dividerSetCallback Set; member
337 fracDivSetCallback Set; member
350 pllSetCallback Set; member
362 selectorSetCallback Set; member
370 gateSetCallback Set; member
382 clockMonitorSetCallback Set; member
392 pcfsSetCallback Set; member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/include/
DClock_Ip_Private.h292 intOscSetCallback Set; member
306 extOscSetCallback Set; member
317 dividerSetCallback Set; member
337 fracDivSetCallback Set; member
350 pllSetCallback Set; member
362 selectorSetCallback Set; member
370 gateSetCallback Set; member
384 clockMonitorSetCallback Set; member
396 pcfsSetCallback Set; member
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip.c557 Clock_Ip_axCmuCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR, 0U); in Clock_Ip_CallEmptyCallbacks()
560 Clock_Ip_axDividerCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
566 Clock_Ip_axFracDivCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
569 Clock_Ip_axGateCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
572 Clock_Ip_axIntOscCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
574 Clock_Ip_axPllCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
577 Clock_Ip_axSelectorCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
579 Clock_Ip_axPcfsCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR, 0U); in Clock_Ip_CallEmptyCallbacks()
758 Clock_Ip_axIntOscCallbacks[CallbackIndex].Set(&(*Config->Ircoscs)[Index]); in Clock_Ip_InitClock()
764 Clock_Ip_axExtOscCallbacks[CallbackIndex].Set(&(*Config->Xoscs)[Index]); in Clock_Ip_InitClock()
[all …]
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip.c548 Clock_Ip_axCmuCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR, 0U); in Clock_Ip_CallEmptyCallbacks()
553 Clock_Ip_axDividerCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
559 Clock_Ip_axFracDivCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
562 Clock_Ip_axGateCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
565 Clock_Ip_axIntOscCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
567 Clock_Ip_axPllCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
570 Clock_Ip_axSelectorCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR); in Clock_Ip_CallEmptyCallbacks()
572 Clock_Ip_axPcfsCallbacks[CLOCK_IP_NO_CALLBACK].Set(NULL_PTR, 0U); in Clock_Ip_CallEmptyCallbacks()
739 Clock_Ip_axIntOscCallbacks[CallbackIndex].Set(&Config->Ircoscs[Index]); in Clock_Ip_InitClock()
745 Clock_Ip_axExtOscCallbacks[CallbackIndex].Set(&Config->Xoscs[Index]); in Clock_Ip_InitClock()
[all …]
/hal_nxp-3.5.0/s32/
DCMakeLists.txt3 # Set the SoC specific drivers and configuration to build
/hal_nxp-3.5.0/mcux/mcux-sdk/docs/
Drun_a_project_using_armgcc.md5 # :one:Set up environment
22 ![Set Up MinGW and MSYS](Getting_Started/images/armgcc_install_mingw_select_component.png)
Drun_a_project_using_mcux.md5 # :one:Set up Environment
/hal_nxp-3.5.0/mcux/mcux-sdk/components/codec/tfa9xxx/
DREADME.md44 2. Set Volume:
/hal_nxp-3.5.0/mcux/mcux-sdk/cmake/backports/
DFindPythonInterp.cmake108 # Set up the versions we know about, in the order we will search. Always add
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1170/
Devkmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript163 // Set SEMC root clock
/hal_nxp-3.5.0/mcux/mcux-sdk/cmake/
Dkconfig.cmake52 # Set environment variables so that Kconfig can prune Kconfig source
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbmimxrt1170/
Devkbmimxrt1170_connect_cm4_cm4side_sdram.jlinkscript163 // Set SEMC root clock
/hal_nxp-3.5.0/mcux/middleware/mcux-sdk-middleware-usb/
DChangeLogKSDK.txt33 - Set USB device CDC demo not to depend on DTR setting from host.
/hal_nxp-3.5.0/mcux/mcux-sdk/components/power_manager/
DREADME.md78 - **PM_SetConstraints** --> MANDATORY ; Set constraints to Power Manager defined by the user, and/o…
148 `/* Set SW pin as GPIO input. */`