1# Copyright 2022-2023 NXP
2
3# Set the SoC specific drivers and configuration to build
4if(${CONFIG_SOC} STREQUAL "s32z27")
5  set(SOC_BASE ${CONFIG_SOC})
6  set(DRIVERS_BASE s32ze)
7elseif(${CONFIG_SOC} MATCHES "s32k3.*")
8  set(SOC_BASE ${CONFIG_SOC})
9  set(DRIVERS_BASE s32k3)
10else()
11  message(FATAL_ERROR "SoC ${CONFIG_SOC} not supported")
12endif()
13
14add_subdirectory(drivers/${DRIVERS_BASE})
15add_subdirectory(soc/${SOC_BASE})
16
17if(CONFIG_HAS_MCUX)
18
19  # This is an adaptation from hal_nxp/mcux/CMakeLists.txt entry CMake in order
20  # to build MCUX drivers together with RTD drivers for NXP S32 devices.
21  # MCUX don't have official support for NXP S32 devices but we are leveraging
22  # the existing shim drivers in Zephyr for those hardware blocks which are
23  # present in both NXP S32 and non NXP S32 devices.
24  #
25  # Glue code must be added for each device supported to build with MCUX. This
26  # can be found in hal_nxp/s32/mcux/devices:
27  # - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_device.h
28  #   redefine RTD module's peripheral access layers and its register masks to be
29  #   compatible with MCUX drivers for incompatible peripherals
30  # - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_features.h
31  #   define SoC module's features
32  # - s32/mcux/devices/${MCUX_DEVICE}/${MCUX_DEVICE}_glue_mcux.h
33  #   redefine RTD module's base addresses/pointers/interrupts to be compatible
34  #   with MCUX drivers
35  # - s32/mcux/devices/${MCUX_DEVICE}/fsl_device_registers.h
36  #   expose device features to the MCUX drivers
37  # - s32/mcux/devices/${MCUX_DEVICE}/drivers/fsl_clock.h
38  #   required by mcux/mcux-sdk/drivers/common/fsl_common_arm.h (at least)
39  # - s32/mcux/devices/${MCUX_DEVICE}/drivers/driver_reset.cmake
40  #   required by mcux/mcux-sdk/drivers/common/drivers_common.cmake
41  # - s32/mcux/devices/${MCUX_DEVICE}/device_system.cmake
42  #   required by mcux/hal_nxp.cmake
43  # - s32/mcux/devices/${MCUX_DEVICE}/device_CMSIS.cmake
44  #   required by mcux/mcux-sdk/drivers/common/drivers_common.cmake for non DSP
45  #   architectures
46
47  set(MCUX_SDK_PROJECT_NAME ${ZEPHYR_CURRENT_LIBRARY})
48
49  # Translate the SoC name and part number into the MCUX device and CPU
50  # name respectively
51  string(TOUPPER ${CONFIG_SOC} MCUX_DEVICE)
52  set(MCUX_CPU CPU_${CONFIG_SOC_PART_NUMBER})
53
54  # This is normally done in mcux/hal_nxp.cmake, but we need to point to the
55  # path on this directory instead
56  list(APPEND CMAKE_MODULE_PATH
57    ${CMAKE_CURRENT_LIST_DIR}/mcux/devices/${MCUX_DEVICE}
58    ${CMAKE_CURRENT_LIST_DIR}/mcux/devices/${MCUX_DEVICE}/drivers
59  )
60
61  # MCUX uses the CPU name to expose SoC-specific features of a given peripheral
62  zephyr_compile_definitions(${MCUX_CPU})
63
64  # Clock control is supported through RTD, so disable it in the MCUX drivers
65  zephyr_compile_definitions(FSL_SDK_DISABLE_DRIVER_CLOCK_CONTROL=1)
66
67  zephyr_include_directories(mcux/devices/${MCUX_DEVICE})
68  zephyr_include_directories(mcux/devices/${MCUX_DEVICE}/drivers)
69
70  zephyr_linker_sources(RWDATA
71    ${CMAKE_CURRENT_LIST_DIR}/../mcux/quick_access_data.ld
72  )
73  zephyr_linker_sources_ifdef(CONFIG_ARCH_HAS_RAMFUNC_SUPPORT
74    RAMFUNC_SECTION
75    ${CMAKE_CURRENT_LIST_DIR}/../mcux/quick_access_code.ld
76  )
77  zephyr_linker_sources_ifdef(CONFIG_NOCACHE_MEMORY
78    NOCACHE_SECTION
79    ${CMAKE_CURRENT_LIST_DIR}/../mcux/nocache.ld
80  )
81
82  # Entry CMake component for MCUX
83  include(${CMAKE_CURRENT_LIST_DIR}/../mcux/hal_nxp.cmake)
84
85endif()
86