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Searched refs:STS0 (Results 1 – 25 of 89) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/flexspi/
Dfsl_flexspi.h631 …*portAPhase = (uint8_t)((base->STS0 & FLEXSPI_STS0_DATALEARNPHASEA_MASK) >> FLEXSPI_STS0_DATALEARN… in FLEXSPI_GetDataLearningPhase()
637 …*portBPhase = (uint8_t)((base->STS0 & FLEXSPI_STS0_DATALEARNPHASEB_MASK) >> FLEXSPI_STS0_DATALEARN… in FLEXSPI_GetDataLearningPhase()
651 (uint32_t)((base->STS0 & FLEXSPI_STS0_ARBCMDSRC_MASK) >> FLEXSPI_STS0_ARBCMDSRC_SHIFT)); in FLEXSPI_GetArbitratorCommandSource()
688 …return (0U != (base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK)) && (0U != (base->STS0 & FLEXSPI_STS0_SEQID… in FLEXSPI_GetBusIdleStatus()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/otfad/
Dfsl_otfad.c98 status = ((FLEXSPI_Type *)config->flexspiBaseAddr)->STS0; in AT_QUICKACCESS_SECTION_CODE()
101 status = ((FLEXSPI_Type *)config->flexspiBaseAddr)->STS0; in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_power.c621 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
622 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
633 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
634 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_power.c621 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
622 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
633 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
634 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_power.c621 while (!(((FLEXSPI0->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
622 ((FLEXSPI0->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
633 while (!(((FLEXSPI1->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
634 ((FLEXSPI1->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/semc/
Dfsl_semc.h828 return ((base->STS0 & SEMC_STS0_IDLE_MASK) != 0x00U) ? true : false; in SEMC_IsInIdle()
873 return ((base->STS0 & SEMC_STS0_NARDY_MASK) != 0x00U) ? true : false; in SEMC_IsNandReady()
Dfsl_semc.c398 while ((base->STS0 & (uint32_t)SEMC_STS0_IDLE_MASK) == 0x00U) in SEMC_Deinit()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/mimxrt685audevk/project_template/
Dboard.c302 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/mimxrt685audevk/
Dboard.c302 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/project_template/
Dboard.c287 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT595S/project_template/
Dboard.c308 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt685/
Dboard.c306 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt685/project_template/
Dboard.c306 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitXip()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt595/
Dboard.c302 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt595/project_template/
Dboard.c302 while (!((base->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) && (base->STS0 & FLEXSPI_STS0_SEQIDLE_MASK))) in BOARD_DeinitFlash()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT685S/drivers/
Dfsl_power.c626 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
627 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT633S/drivers/
Dfsl_power.c626 while (!(((FLEXSPI->STS0 & FLEXSPI_STS0_ARBIDLE_MASK) != 0U) && in AT_QUICKACCESS_SECTION_CODE()
627 ((FLEXSPI->STS0 & FLEXSPI_STS0_SEQIDLE_MASK) != 0U))) in AT_QUICKACCESS_SECTION_CODE()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h19588 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
33950 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h19572 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
33933 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h21872 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
36910 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h20540 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
35508 __I uint32_t STS0; /**< Status register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h21325 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
39774 __I uint32_t STS0; /**< Status register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h22250 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
37797 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h21874 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
40320 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h23036 __I uint32_t STS0; /**< Status Register 0, offset: 0xE0 */ member
41991 __I uint32_t STS0; /**< Status Register 0, offset: 0xC0 */ member

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