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Searched refs:SRAM1 (Results 1 – 25 of 58) sorted by relevance

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/Zephyr-latest/soc/st/stm32/stm32wbx/
Dipm.ld7 MAPPING_TABLE (NOLOAD) : {_sMAPPING_TABLE = .; *(MAPPING_TABLE); _eMAPPING_TABLE = .; } >SRAM1
8 MB_MEM1 (NOLOAD) : { _sMB_MEM1 = .; *(MB_MEM1); _eMB_MEM1 = .; } >SRAM1
9 MB_MEM2 (NOLOAD) : { _sMB_MEM2 = .; *(MB_MEM2); _eMB_MEM2 = .; } >SRAM1
/Zephyr-latest/soc/nxp/imxrt/imxrt5xx/cm33/
Dusb.ld13 } GROUP_LINK_IN(SRAM1)
22 } GROUP_LINK_IN(SRAM1)
/Zephyr-latest/soc/nxp/imxrt/
Dusb.ld13 } GROUP_LINK_IN(SRAM1)
22 } GROUP_LINK_IN(SRAM1)
/Zephyr-latest/drivers/clock_control/
DKconfig.lpc11u6x18 bool "SRAM1"
20 Enable SRAM1
/Zephyr-latest/samples/subsys/display/lvgl/boards/
Dmax32662evkit.overlay14 * Concatenate SRAM0(16KB), SRAM1(16KB) and SRAM2(16KB)
/Zephyr-latest/dts/arm/st/u5/
Dstm32u575Xi.dtsi11 /* SRAM1 + SRAM2 + SRAM3 */
Dstm32u585Xi.dtsi11 /* SRAM1 + SRAM2 + SRAM3 */
Dstm32u5a5Xj.dtsi12 /* SRAM1 + SRAM2 + SRAM3 + SRAM5 */
Dstm32u599Xj.dtsi11 /* SRAM1 + SRAM2 + SRAM3 + SRAM5 */
Dstm32u545Xi.dtsi11 /* SRAM1 + SRAM2 */
Dstm32u5a9Xj.dtsi12 /* SRAM1 + SRAM2 + SRAM3 + SRAM5 */
/Zephyr-latest/tests/kernel/mem_protect/userspace/boards/
Dmimxrt595_evk_mimxrt595s_cm33.overlay10 * otherwise would be taken up for the SRAM1 USB region.
Dmimxrt685_evk_mimxrt685s_cm33.overlay10 * otherwise would be taken up for the SRAM1 USB region.
/Zephyr-latest/dts/arm/nxp/
Dnxp_lpc55S36_ns.dtsi23 * Combine SRAM0, SRAM1, SRAM2, SRAM3, SRAM4 for total of 112K RAM
Dnxp_lpc55S06_ns.dtsi33 * Combine SRAM0, SRAM1, SRAM2 for total of 80K RAM
Dnxp_lpc54xxx.dtsi56 * LPC540xx: RAMX: 192K, SRAM0: 64K, SRAM1: 32K, SRAM2: 32K, SRAM3: 32K, USBRAM: 8K
57 * LPC5410x: RAMX: ----, SRAM0: 64K, SRAM1: 32K, USBRAM: 8K @ 0x03400000
58 * LPC5411x: RAMX: 32K, SRAM0: 64K, SRAM1: 64K, SRAM2: 32K
73 zephyr,memory-region = "SRAM1";
/Zephyr-latest/dts/arm/st/u0/
Dstm32u031X4.dtsi14 zephyr,memory-region = "SRAM1";
Dstm32u031X6.dtsi14 zephyr,memory-region = "SRAM1";
Dstm32u031X8.dtsi14 zephyr,memory-region = "SRAM1";
Dstm32u083Xc.dtsi14 zephyr,memory-region = "SRAM1";
/Zephyr-latest/dts/arm/st/h5/
Dstm32h533Xe.dtsi13 zephyr,memory-region = "SRAM1";
/Zephyr-latest/dts/arm/st/h7/
Dstm32h7a3.dtsi112 /* System data RAM accessible over AXI bus: AXI SRAM1 in CD domain */
122 zephyr,memory-region = "SRAM1";
132 /* System data RAM accessible over AHB bus: SRAM1 in CD domain */
Dstm32h743.dtsi71 /* System data RAM accessible over AHB bus: SRAM1 in D2 domain */
75 zephyr,memory-region = "SRAM1";
/Zephyr-latest/dts/arm/gd/gd32l23x/
Dgd32l233rc.dtsi17 /* Combine SRAM0(16K) and SRAM1(16K), since its address is continuous. */
/Zephyr-latest/dts/arm/st/f7/
Dstm32f722.dtsi11 * 176KB SRAM1 @ 0x20010000, 16KB SRAM2 @ 0x2003C00

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