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Searched refs:NOR_CMD_LUT_SEQ_IDX_WRITEENABLE (Results 1 – 25 of 58) sorted by relevance

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/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt685audevk/
Dmflash_drv.c18 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
86 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
196 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
251 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_flash_sector_erase()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/nor/flexspi/
Dfsl_flexspi_nor_flash.c1126 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in FLEXSPI_NOR_WriteEnable()
1633 config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = in FLEXSPI_NOR_ParseSFDP()
1749 config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = in FLEXSPI_NOR_ParseSFDP()
1751 … FLEXSPI_UpdateLUT((FLEXSPI_Type *)handle->driverBaseAddr, NOR_CMD_LUT_SEQ_IDX_WRITEENABLE * 4UL, in FLEXSPI_NOR_ParseSFDP()
1752 &config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE], 4); in FLEXSPI_NOR_ParseSFDP()
1788 … FLEXSPI_NOR_Memset(&config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE], 0, 4 * 4); in FLEXSPI_NOR_ParseSFDP()
1789 config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = in FLEXSPI_NOR_ParseSFDP()
1854 … FLEXSPI_NOR_Memset(&config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE], 0, 4 * 4); in FLEXSPI_NOR_ParseSFDP()
1855 config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = in FLEXSPI_NOR_ParseSFDP()
2228 config->lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = FLEXSPI_LUT_SEQ( in FLEXSPI_NOR_EnableQuadMode()
[all …]
Dfsl_flexspi_nor_flash.h36 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 3U /*!< Write enable LUT sequence id in lookupTable stored … macro
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1170evkb/
Dmflash_drv.c18 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
72 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
168 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1160/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt685/
Dmflash_drv.c22 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
85 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
211 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1021/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1024/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1170/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt595/
Dmflash_drv.c22 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
82 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
207 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1042/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1062/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/flash/mflash/mimxrt1064/
Dmflash_drv.c19 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 4 macro
79 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
183 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/evkmimxrt1040/
Dfsl_adapter_flexspi_nor_flash.c32 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
125 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
177 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/octal_flash/RT595/
Dfsl_adapter_flexspi_nor_flash.c28 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
125 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
196 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/octal_flash/
Dfsl_adapter_flexspi_nor_flash.c28 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
133 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
205 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/evkbmimxrt1060/
Dfsl_adapter_flexspi_nor_flash.c32 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
125 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
185 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/
Dfsl_adapter_flexspi_nor_flash.c32 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
125 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
185 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/components/internal_flash/evkbmimxrt1170/
Dfsl_adapter_flexspi_nor_flash.c35 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE 2 macro
124 [4 * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
174 flashXfer.seqIndex = NOR_CMD_LUT_SEQ_IDX_WRITEENABLE; in flexspi_nor_write_enable()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1064/xip/
Devkmimxrt1064_flexspi_nor_config.h227 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1020/xip/
Devkmimxrt1020_flexspi_nor_config.h225 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1170/xip/
Devkmimxrt1170_flexspi_nor_config.h227 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1024/cmsis_pack_flash_algo/
DFlashPrg.c73 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] = in flexspi_nor_get_config()
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkmimxrt1015/xip/
Devkmimxrt1015_flexspi_nor_config.h225 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ macro
/hal_nxp-3.5.0/mcux/mcux-sdk/boards/evkbimxrt1050/xip/
Devkbimxrt1050_flexspi_nor_config.h226 #define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \ macro

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