1 /***********************************************************************/
2 /* This file is part of the ARM Toolchain package */
3 /* Copyright (c) 2010 Keil - An ARM Company. All rights reserved. */
4 /***********************************************************************/
5 /* */
6 /* FlashDev.C: Flash Programming Functions adapted */
7 /* for New Device 256kB Flash */
8 /* */
9 /***********************************************************************/
10
11 #include "FlashOS.H" // FlashOS Structures
12 #include "fsl_romapi.h"
13
14 #define FLEXSPI_NOR_INSTANCE 0
15 #define SECTOR_SIZE (4096)
16 #define BASE_ADDRESS (0x60000000)
17
18 /* Init this global variable to workaround of the issue to running this flash algo in Segger */
19 flexspi_nor_config_t config = {1};
20
21 /*
22 * Initialize Flash Programming Functions
23 * Parameter: adr: Device Base Address
24 * clk: Clock Frequency (Hz)
25 * fnc: Function Code (1 - Erase, 2 - Program, 3 - Verify)
26 * Return Value: 0 - OK, 1 - Failed
27 */
28
29 /*${macro:start}*/
30 #define FlexSpiInstance 0U
31 #define EXAMPLE_FLEXSPI_AMBA_BASE FlexSPI_AMBA_BASE
32 #define FLASH_SIZE 0x400000UL /* 4Mb */
33 #define FLASH_PAGE_SIZE 256UL /* 256Bytes */
34 #define FLASH_SECTOR_SIZE 0x1000UL /* 4KBytes */
35 #define FLASH_BLOCK_SIZE 0x10000UL /* 64KBytes */
36 /*${macro:end}*/
37
flexspi_nor_get_config(flexspi_nor_config_t * config)38 void flexspi_nor_get_config(flexspi_nor_config_t *config)
39 {
40 config->memConfig.tag = FLEXSPI_CFG_BLK_TAG;
41 config->memConfig.version = FLEXSPI_CFG_BLK_VERSION;
42 config->memConfig.readSampleClkSrc = kFLEXSPIReadSampleClk_LoopbackFromDqsPad;
43 config->memConfig.serialClkFreq =
44 kFLEXSPISerialClk_133MHz; /* Serial Flash Frequencey.See System Boot Chapter for more details */
45 config->memConfig.sflashA1Size = FLASH_SIZE;
46 config->memConfig.csHoldTime = 3U; /* Data hold time, default value: 3 */
47 config->memConfig.csSetupTime = 3U; /* Date setup time, default value: 3 */
48 config->memConfig.deviceType = kFLEXSPIDeviceType_SerialNOR; /* Flash device type default type: Serial NOR */
49 config->memConfig.deviceModeType = kDeviceConfigCmdType_Generic;
50 config->memConfig.columnAddressWidth = 0U;
51 config->memConfig.deviceModeCfgEnable = 0U;
52 config->memConfig.waitTimeCfgCommands = 0U;
53 config->memConfig.configCmdEnable = 0U;
54 /* Always enable Safe configuration Frequency */
55 config->memConfig.controllerMiscOption = FSL_ROM_FLEXSPI_BITMASK(kFLEXSPIMiscOffset_SafeConfigFreqEnable);
56 config->memConfig.sflashPadType = kSerialFlash_4Pads; /* Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal */
57 config->pageSize = FLASH_PAGE_SIZE;
58 config->sectorSize = FLASH_SECTOR_SIZE;
59 config->blockSize = FLASH_BLOCK_SIZE;
60 config->ipcmdSerialClkFreq = kFLEXSPISerialClk_30MHz; /* Clock frequency for IP command */
61
62 /* Fast Read Quad I/O */
63 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_READ + 0U] =
64 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xebU, RADDR_SDR, FLEXSPI_4PAD, 0x18U);
65 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_READ + 1U] =
66 FSL_ROM_FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06U, READ_SDR, FLEXSPI_4PAD, 0x4U);
67
68 /* Read Status */
69 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_READSTATUS] =
70 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x05U, READ_SDR, FLEXSPI_1PAD, 0x1U);
71
72 /* Write Enable */
73 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_WRITEENABLE] =
74 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x06U, STOP, FLEXSPI_1PAD, 0x0U);
75
76 /* Page Program - quad mode */
77 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM + 0U] =
78 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x32U, RADDR_SDR, FLEXSPI_1PAD, 0x18U);
79 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM + 1U] =
80 FSL_ROM_FLEXSPI_LUT_SEQ(WRITE_SDR, FLEXSPI_4PAD, 0x04U, STOP, FLEXSPI_1PAD, 0x0U);
81
82 /* Sector Erase */
83 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_ERASESECTOR] =
84 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0x20U, RADDR_SDR, FLEXSPI_1PAD, 0x18U);
85
86 /* Block Erase */
87 config->memConfig.lookupTable[4U * NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK] =
88 FSL_ROM_FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xD8U, RADDR_SDR, FLEXSPI_1PAD, 0x18U);
89 }
90
Init(unsigned long adr,unsigned long clk,unsigned long fnc)91 int Init(unsigned long adr, unsigned long clk, unsigned long fnc)
92 {
93 status_t status;
94
95 WDOG1->WMCR &= ~WDOG_WMCR_PDE_MASK;
96 WDOG2->WMCR &= ~WDOG_WMCR_PDE_MASK;
97
98 /* Watchdog disable */
99
100 if (WDOG1->WCR & WDOG_WCR_WDE_MASK)
101 {
102 WDOG1->WCR &= ~WDOG_WCR_WDE_MASK;
103 }
104 if (WDOG2->WCR & WDOG_WCR_WDE_MASK)
105 {
106 WDOG2->WCR &= ~WDOG_WCR_WDE_MASK;
107 }
108 RTWDOG->CNT = 0xD928C520U; /* 0xD928C520U is the update key */
109 RTWDOG->TOVAL = 0xFFFF;
110 RTWDOG->CS = (uint32_t)((RTWDOG->CS) & ~RTWDOG_CS_EN_MASK) | RTWDOG_CS_UPDATE_MASK;
111
112 IOMUXC->SW_MUX_CTL_PAD[86] = IOMUXC_SW_MUX_CTL_PAD_MUX_MODE(1) | IOMUXC_SW_MUX_CTL_PAD_SION(1);
113 if (SCB_CCR_DC_Msk == (SCB_CCR_DC_Msk & SCB->CCR))
114 {
115 SCB_DisableDCache();
116 }
117 memset(&config, 0U, sizeof(flexspi_nor_config_t));
118 flexspi_nor_get_config(&config);
119 status = ROM_FLEXSPI_NorFlash_Init(FLEXSPI_NOR_INSTANCE, &config);
120 }
121
122 /*
123 * De-Initialize Flash Programming Functions
124 * Parameter: fnc: Function Code (1 - Erase, 2 - Program, 3 - Verify)
125 * Return Value: 0 - OK, 1 - Failed
126 */
127
UnInit(unsigned long fnc)128 int UnInit(unsigned long fnc)
129 {
130 /* Add your Code */
131 return (0); // Finished without Errors
132 }
133
134 /*
135 * Erase complete Flash Memory
136 * Return Value: 0 - OK, 1 - Failed
137 */
138
EraseChip(void)139 int EraseChip(void)
140 {
141 status_t status;
142 status = ROM_FLEXSPI_NorFlash_Erase(FLEXSPI_NOR_INSTANCE, &config, 0, FLASH_SIZE); // Erase all
143 if (status != kStatus_Success)
144 {
145 return (1);
146 }
147 else
148 {
149 return (0); // Finished without Errors
150 }
151 }
152
153 /*
154 * Erase Sector in Flash Memory
155 * Parameter: adr: Sector Address
156 * Return Value: 0 - OK, 1 - Failed
157 */
158
EraseSector(unsigned long adr)159 int EraseSector(unsigned long adr)
160 {
161 status_t status;
162 adr = adr - BASE_ADDRESS;
163 status = ROM_FLEXSPI_NorFlash_Erase(FLEXSPI_NOR_INSTANCE, &config, adr, SECTOR_SIZE); // Erase 1 sector
164 if (status != kStatus_Success)
165 {
166 return (1);
167 }
168 else
169 {
170 return (0);
171 }
172 }
173
174 /*
175 * Program Page in Flash Memory
176 * Parameter: adr: Page Start Address
177 * sz: Page Size
178 * buf: Page Data
179 * Return Value: 0 - OK, 1 - Failed
180 */
181
ProgramPage(unsigned long adr,unsigned long sz,unsigned char * buf)182 int ProgramPage(unsigned long adr, unsigned long sz, unsigned char *buf)
183 {
184 status_t status;
185 adr = adr - BASE_ADDRESS;
186 // Program data to destination
187 status = ROM_FLEXSPI_NorFlash_ProgramPage(FLEXSPI_NOR_INSTANCE, &config, adr, (uint32_t *)buf); // program 1 page
188
189 if (status != kStatus_Success)
190 {
191 return (1);
192 }
193 else
194 {
195 return (0);
196 }
197 }
198
