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Searched refs:MUX_11_DC_0 (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_CGM.h144 …__IO uint32_t MUX_11_DC_0; /**< Clock Mux 11 Divider 0 Control Register, off… member
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c3873 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM->MUX_11_DC_0 & MC_CGM_MUX_11_DC_0_DE_MASK) >> … in Clock_Ip_Get_TRACE_CLK_Frequency()
3874 …Frequency /= (((IP_MC_CGM->MUX_11_DC_0 & MC_CGM_MUX_11_DC_0_DIV_MASK) >> MC_CGM_MUX_11_DC_0_DIV_SH… in Clock_Ip_Get_TRACE_CLK_Frequency()
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_CGM.h168 …__IO uint32_t MUX_11_DC_0; /**< Clock Mux 11 Divider 0 Control Register, off… member
/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c1948 …Frequency &= Clock_Ip_au32EnableDivider[((IP_MC_CGM_1->MUX_11_DC_0 & MC_CGM_MUX_11_DC_0_DE_MASK) >… in Clock_Ip_Get_P1_LFAST0_REF_CLK_Frequency()
1949 …Frequency /= (((IP_MC_CGM_1->MUX_11_DC_0 & MC_CGM_MUX_11_DC_0_DIV_MASK) >> MC_CGM_MUX_11_DC_0_DIV_… in Clock_Ip_Get_P1_LFAST0_REF_CLK_Frequency()