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Searched refs:MC_CGM_MUX_6_CSS_SELSTAT_SHIFT (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-3.5.0/s32/drivers/s32ze/Mcu/src/
DClock_Ip_Frequency.c1655 …((IP_MC_CGM_0->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_P0_FR_PE_CLK_Frequency()
1664 …((IP_MC_CGM_0->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_FRAY0_CLK_Frequency()
1674 …((IP_MC_CGM_0->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_FRAY1_CLK_Frequency()
2505 …0U == ((IP_MC_CGM_4->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)) in Clock_Ip_Get_CLKOUT2_CLK_Frequency()
2611 …((IP_MC_CGM_1->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_ETH0_TX_MII_CLK_Frequency()
2621 …((IP_MC_CGM_1->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_ENET0_CLK_Frequency()
3226 …((IP_MC_CGM_1->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_ETH0_TX_RGMII_CLK_Frequency()
3236 …((IP_MC_CGM_1->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)]();/*… in Clock_Ip_Get_ETH0_TX_RGMII_LPBK_CLK_Frequency()
/hal_nxp-3.5.0/s32/drivers/s32k3/BaseNXP/header/
DS32K344_MC_CGM.h788 #define MC_CGM_MUX_6_CSS_SELSTAT_SHIFT (24U) macro
790 …_CSS_SELSTAT(x) (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)) & MC…
/hal_nxp-3.5.0/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_MC_CGM.h1095 #define MC_CGM_MUX_6_CSS_SELSTAT_SHIFT (24U) macro
1097 …_CSS_SELSTAT(x) (((uint32_t)(((uint32_t)(x)) << MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)) & MC…
/hal_nxp-3.5.0/s32/drivers/s32k3/Mcu/src/
DClock_Ip_Frequency.c2003 …c[((IP_MC_CGM->MUX_6_CSS & MC_CGM_MUX_6_CSS_SELSTAT_MASK) >> MC_CGM_MUX_6_CSS_SELSTAT_SHIFT)](); … in Clock_Ip_Get_CLKOUT_RUN_CLK_Frequency()