Searched refs:IP_MC_ME (Results 1 – 7 of 7) sorted by relevance
1778 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK53_M… in Clock_Ip_Get_FXOSC_CLK_Frequency()1790 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK51_M… in Clock_Ip_Get_SXOSC_CLK_Frequency()2015 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK40_M… in Clock_Ip_Get_ADC0_CLK_Frequency()2025 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK41_M… in Clock_Ip_Get_ADC1_CLK_Frequency()2036 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK42_M… in Clock_Ip_Get_ADC2_CLK_Frequency()2048 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN0_COFB1_STAT & MC_ME_PRTN0_COFB1_STAT_BLOCK43_M… in Clock_Ip_Get_ADC3_CLK_Frequency()2060 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN3_COFB1_STAT & MC_ME_PRTN3_COFB1_STAT_BLOCK52_M… in Clock_Ip_Get_ADC4_CLK_Frequency()2072 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN3_COFB1_STAT & MC_ME_PRTN3_COFB1_STAT_BLOCK53_M… in Clock_Ip_Get_ADC5_CLK_Frequency()2084 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN3_COFB1_STAT & MC_ME_PRTN3_COFB1_STAT_BLOCK54_M… in Clock_Ip_Get_ADC6_CLK_Frequency()2096 …Frequency &= Clock_Ip_u32EnableGate[(IP_MC_ME->PRTN3_COFB2_STAT & MC_ME_PRTN3_COFB2_STAT_BLOCK65_M… in Clock_Ip_Get_ADCBIST_CLK_Frequency()[all …]
206 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK56_MASK)) in Clock_Ip_PllPowerClockIp()209 …IP_MC_ME->PRTN1_COFB1_CLKEN |= MC_ME_PRTN1_COFB1_CLKEN_REQ56(1U); /* REQ56: Frequency Modulated … in Clock_Ip_PllPowerClockIp()210 …IP_MC_ME->PRTN1_PCONF |= MC_ME_PRTN1_PCONF_PCE_MASK; /* PCE=1: Enable the clock to … in Clock_Ip_PllPowerClockIp()211 …IP_MC_ME->PRTN1_PUPD |= MC_ME_PRTN1_PUPD_PCUD_MASK; /* PCUD=1: Trigger the hardwar… in Clock_Ip_PllPowerClockIp()219 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK56_MASK)) && (FALSE == Time… in Clock_Ip_PllPowerClockIp()230 if (0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK57_MASK)) in Clock_Ip_PllPowerClockIp()233 …IP_MC_ME->PRTN1_COFB1_CLKEN |= MC_ME_PRTN1_COFB1_CLKEN_REQ57(1U); /* REQ57: Frequency Modulated … in Clock_Ip_PllPowerClockIp()234 …IP_MC_ME->PRTN1_PCONF |= MC_ME_PRTN1_PCONF_PCE_MASK; /* PCE=1: Enable the clock to … in Clock_Ip_PllPowerClockIp()235 …IP_MC_ME->PRTN1_PUPD |= MC_ME_PRTN1_PUPD_PCUD_MASK; /* PCUD=1: Trigger the hardwar… in Clock_Ip_PllPowerClockIp()243 …while((0U == (IP_MC_ME->PRTN1_COFB1_STAT & MC_ME_PRTN1_COFB1_STAT_BLOCK57_MASK)) && (FALSE == Time… in Clock_Ip_PllPowerClockIp()[all …]
247 WfiStatus = (IP_MC_ME->PRTN0_CORE2_STAT & MC_ME_PRTN0_CORE2_STAT_WFI_MASK); in Clock_Ip_SetFircDivSelHSEb()
3523 (volatile Clock_Ip_McmePartitionSetType*)( ((volatile uint8*)&(IP_MC_ME->PRTN1_COFB0_CLKEN)) ),3525 (volatile Clock_Ip_McmePartitionSetType*)( ((volatile uint8*)&(IP_MC_ME->PRTN2_COFB0_CLKEN)) ),3530 (volatile Clock_Ip_McmePartitionSetType*)( ((volatile uint8*)&(IP_MC_ME->PRTN3_COFB0_CLKEN)) ),3541 …(volatile const Clock_Ip_McmePartitionGetType*)( ((volatile const uint8*)&(IP_MC_ME->PRTN1_COFB0_S…3543 …(volatile const Clock_Ip_McmePartitionGetType*)( ((volatile const uint8*)&(IP_MC_ME->PRTN2_COFB0_S…3548 …(volatile const Clock_Ip_McmePartitionGetType*)( ((volatile const uint8*)&(IP_MC_ME->PRTN3_COFB0_S…3556 (volatile Clock_Ip_McmePartitionTriggerType*)( ((volatile uint8*)&(IP_MC_ME->PRTN0_PCONF)) ),3558 (volatile Clock_Ip_McmePartitionTriggerType*)( ((volatile uint8*)&(IP_MC_ME->PRTN1_PCONF)) ),3560 (volatile Clock_Ip_McmePartitionTriggerType*)( ((volatile uint8*)&(IP_MC_ME->PRTN2_PCONF)) ),3565 (volatile Clock_Ip_McmePartitionTriggerType*)( ((volatile uint8*)&(IP_MC_ME->PRTN3_PCONF)) ),
330 IP_MC_ME->CTL_KEY = 0x5AF0; /* Enter key */ in Clock_Ip_McMeEnterKey()332 IP_MC_ME->CTL_KEY = 0xA50F; /* Enter inverted key */ in Clock_Ip_McMeEnterKey()
177 #define IP_MC_ME ((MC_ME_Type *)IP_MC_ME_BASE) macro181 #define IP_MC_ME_BASE_PTRS { IP_MC_ME }
127 #define IP_MC_ME ((MC_ME_Type *)IP_MC_ME_BASE) macro131 #define IP_MC_ME_BASE_PTRS { IP_MC_ME }
