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Searched refs:GPC_IMR_IMR3_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/gpc_2/
Dfsl_gpc.h37 #define GPC_IMR_IMR3_MASK GPC_IMR_M4_IMR3_M4_MASK macro
70 #define GPC_IMR_IMR3_MASK GPC_IMR_M7_IMR3_M7_MASK macro
Dfsl_gpc.c42 base->GPC_IMR[2U] = GPC_IMR_IMR3_MASK; in GPC_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h17217 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
17219 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h14642 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
14644 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h20679 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
20681 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h20663 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
20665 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h22980 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
22982 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h21609 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
21611 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h22394 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
22396 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h23359 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
23361 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h22982 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
22984 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h24145 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
24147 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h24208 #define GPC_IMR_IMR3_MASK (0xFFFFFFFFU) macro
24210 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR3_SHIFT)) & GPC_IMR_IMR3_MASK)