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Searched refs:GPC_IMR_IMR2_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-3.5.0/mcux/mcux-sdk/drivers/gpc_2/
Dfsl_gpc.h36 #define GPC_IMR_IMR2_MASK GPC_IMR_M4_IMR2_M4_MASK macro
69 #define GPC_IMR_IMR2_MASK GPC_IMR_M7_IMR2_M7_MASK macro
Dfsl_gpc.c41 base->GPC_IMR[1U] = GPC_IMR_IMR2_MASK; in GPC_Init()
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h17213 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
17215 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h14638 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
14640 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h20675 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
20677 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h20659 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
20661 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h22976 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
22978 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h21605 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
21607 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h22390 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
22392 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h23355 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
23357 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h22978 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
22980 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h24141 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
24143 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)
/hal_nxp-3.5.0/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h24204 #define GPC_IMR_IMR2_MASK (0xFFFFFFFFU) macro
24206 … (((uint32_t)(((uint32_t)(x)) << GPC_IMR_IMR2_SHIFT)) & GPC_IMR_IMR2_MASK)