Searched refs:DVPORT (Results 1 – 4 of 4) sorted by relevance
260 IP_CORE_DFS->DVPORT[0U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()261 IP_CORE_DFS->DVPORT[1U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()262 IP_CORE_DFS->DVPORT[2U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()263 IP_CORE_DFS->DVPORT[3U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()264 IP_CORE_DFS->DVPORT[4U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()265 IP_CORE_DFS->DVPORT[5U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()270 IP_PERIPH_DFS->DVPORT[0U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()271 IP_PERIPH_DFS->DVPORT[1U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()272 IP_PERIPH_DFS->DVPORT[2U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()273 IP_PERIPH_DFS->DVPORT[3U] = DFS_DVPORT; in Clock_Ip_SpecificPlatformInitClock()[all …]
1422 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[0U])) in Clock_Ip_Get_COREPLL_DFS0_Frequency()1424 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[0U]); in Clock_Ip_Get_COREPLL_DFS0_Frequency()1432 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[1U])) in Clock_Ip_Get_COREPLL_DFS1_Frequency()1434 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[1U]); in Clock_Ip_Get_COREPLL_DFS1_Frequency()1442 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[2U])) in Clock_Ip_Get_COREPLL_DFS2_Frequency()1444 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[2U]); in Clock_Ip_Get_COREPLL_DFS2_Frequency()1452 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[3U])) in Clock_Ip_Get_COREPLL_DFS3_Frequency()1454 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[3U]); in Clock_Ip_Get_COREPLL_DFS3_Frequency()1462 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[4U])) in Clock_Ip_Get_COREPLL_DFS4_Frequency()1464 …LLCLKMUX ^ IP_CORE_PLL->PLLDV ^ IP_CORE_PLL->PLLFD ^ IP_CORE_PLL->PLLSR ^ IP_CORE_DFS->DVPORT[4U]); in Clock_Ip_Get_COREPLL_DFS4_Frequency()[all …]
161 Clock_Ip_apxDfs[Instance]->DVPORT[DividerIndex] = Value; in Clock_Ip_SetDfsMfiMfn()
81 …__IO uint32_t DVPORT[DFS_DVPORT_COUNT]; /**< Divider for Port 0..Divider for Port 5, arra… member
