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Searched refs:SIM_SOPT2_TPMSRC_MASK (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-2.7.6/mcux/devices/MKW30Z4/
Dsystem_MKW30Z4.c147 …>SOPT2 = ((SIM->SOPT2) & (uint32_t)(~(SIM_SOPT2_TPMSRC_MASK))) | ((SYSTEM_SIM_SOPT2_VALUE) & (SIM_… in SystemInit()
DMKW30Z4.h6865 #define SIM_SOPT2_TPMSRC_MASK 0x3000000u macro
6868 … (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_TPMSRC_SHIFT))&SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW20Z4/
Dsystem_MKW20Z4.c147 …>SOPT2 = ((SIM->SOPT2) & (uint32_t)(~(SIM_SOPT2_TPMSRC_MASK))) | ((SYSTEM_SIM_SOPT2_VALUE) & (SIM_… in SystemInit()
DMKW20Z4.h6865 #define SIM_SOPT2_TPMSRC_MASK 0x3000000u macro
6868 … (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_TPMSRC_SHIFT))&SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW40Z4/
Dsystem_MKW40Z4.c147 …>SOPT2 = ((SIM->SOPT2) & (uint32_t)(~(SIM_SOPT2_TPMSRC_MASK))) | ((SYSTEM_SIM_SOPT2_VALUE) & (SIM_… in SystemInit()
DMKW40Z4.h6865 #define SIM_SOPT2_TPMSRC_MASK 0x3000000u macro
6868 … (((uint32_t)(((uint32_t)(x))<<SIM_SOPT2_TPMSRC_SHIFT))&SIM_SOPT2_TPMSRC_MASK)
DMKW40Z4_extension.h19377 #define SIM_RD_SOPT2_TPMSRC(base) ((SIM_SOPT2_REG(base) & SIM_SOPT2_TPMSRC_MASK) >> SIM_SOPT2_TPMSR…
19381 #define SIM_WR_SOPT2_TPMSRC(base, value) (SIM_RMW_SOPT2(base, SIM_SOPT2_TPMSRC_MASK, SIM_SOPT2_TPMS…
/hal_nxp-2.7.6/mcux/devices/MKW41Z4/
Dfsl_clock.h624 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
DMKW41Z4.h6319 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
6321 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKL25Z4/
Dfsl_clock.h616 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
DMKL25Z4.h3694 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
3696 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MK80F25615/
Dfsl_clock.h757 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
DMK80F25615.h21533 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
21541 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MK82F25615/
Dfsl_clock.h764 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
DMK82F25615.h22506 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
22514 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MK66F18/
Dfsl_clock.h799 SIM->SOPT2 = ((SIM->SOPT2 & ~SIM_SOPT2_TPMSRC_MASK) | SIM_SOPT2_TPMSRC(src)); in CLOCK_SetTpmClock()
DMK66F18.h21568 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
21576 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW31Z4/
DMKW31Z4.h6319 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
6321 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)
/hal_nxp-2.7.6/mcux/devices/MKW21Z4/
DMKW21Z4.h6248 #define SIM_SOPT2_TPMSRC_MASK (0x3000000U) macro
6250 … (((uint32_t)(((uint32_t)(x)) << SIM_SOPT2_TPMSRC_SHIFT)) & SIM_SOPT2_TPMSRC_MASK)