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Searched refs:u32PllFreq (Results 1 – 7 of 7) sorted by relevance

/hal_nuvoton-latest/m46x/StdDriver/src/
Dclk.c1041 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq) in CLK_EnablePLL() argument
1086 if((u32PllFreq <= FREQ_500MHZ) && (u32PllFreq >= FREQ_50MHZ)) in CLK_EnablePLL()
1089 if((u32PllFreq < FREQ_100MHZ) && (u32PllFreq >= FREQ_50MHZ)) in CLK_EnablePLL()
1092 u32PllFreq = u32PllFreq << 2; in CLK_EnablePLL()
1094 else if((u32PllFreq < FREQ_200MHZ) && (u32PllFreq >= FREQ_100MHZ)) in CLK_EnablePLL()
1097 u32PllFreq = u32PllFreq << 1; in CLK_EnablePLL()
1122 … u32Tmp3 = (u32Tmp2 > u32PllFreq) ? u32Tmp2 - u32PllFreq : u32PllFreq - u32Tmp2; in CLK_EnablePLL()
1403 uint32_t u32PllFreq = 0UL, u32PllReg; in CLK_GetPLLClockFreq() local
1411 u32PllFreq = 0UL; /* PLL is in power down mode or fix low */ in CLK_GetPLLClockFreq()
1428 u32PllFreq = u32FIN; /* PLL is in bypass mode */ in CLK_GetPLLClockFreq()
[all …]
/hal_nuvoton-latest/m48x/StdDriver/src/
Dclk.c790 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq) in CLK_EnablePLL() argument
832 if((u32PllFreq <= FREQ_500MHZ) && (u32PllFreq >= FREQ_50MHZ)) in CLK_EnablePLL()
840 u32basFreq = u32PllFreq; in CLK_EnablePLL()
855 u32PllFreq = u32basFreq << 2; in CLK_EnablePLL()
859 u32PllFreq = u32basFreq << 1; in CLK_EnablePLL()
883 … u32Tmp3 = (u32Tmp2 > (u32PllFreq>>2)) ? u32Tmp2 - (u32PllFreq>>2) : (u32PllFreq>>2) - u32Tmp2; in CLK_EnablePLL()
1190 uint32_t u32PllFreq = 0UL, u32PllReg; in CLK_GetPLLClockFreq() local
1198 u32PllFreq = 0UL; /* PLL is in power down mode or fix low */ in CLK_GetPLLClockFreq()
1211 u32PllFreq = u32FIN; in CLK_GetPLLClockFreq()
1229 u32PllFreq = (((u32FIN >> 2) * u32NF) / (u32NR * u32NO) << 2) * 2UL; in CLK_GetPLLClockFreq()
[all …]
/hal_nuvoton-latest/m2l31x/StdDriver/src/
Dclk.c978 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq) in CLK_EnablePLL() argument
1027 if((u32PllFreq <= u32PLL_UpperLimit) && (u32PllFreq >= FREQ_25MHZ)) in CLK_EnablePLL()
1029 if (u32PllFreq <= FREQ_120MHZ) in CLK_EnablePLL()
1035 else if (u32PllFreq <= FREQ_240MHZ) in CLK_EnablePLL()
1071 … u32FoutOffset = (u32Fout > u32PllFreq) ? (u32Fout - u32PllFreq) : (u32PllFreq - u32Fout); in CLK_EnablePLL()
1348 uint32_t u32PllFreq = 0UL, u32PllReg, u32Pll2Reg; in CLK_GetPLLClockFreq() local
1357 u32PllFreq = 0UL; /* PLL is in power down mode or fix low */ in CLK_GetPLLClockFreq()
1370 u32PllFreq = u32FIN; in CLK_GetPLLClockFreq()
1389 u32PllFreq = (((u32FIN >> 2) * u32NF) / (u32NR * u32NO) << 2) * 2UL; in CLK_GetPLLClockFreq()
1392 return u32PllFreq; in CLK_GetPLLClockFreq()
/hal_nuvoton-latest/dts/m46x/
Dclk.h1255 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
1268 uint32_t CLK_EnablePLLFN(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h687 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h1225 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
1238 uint32_t CLK_EnablePLLFN(uint32_t u32PllClkSrc, uint32_t u32PllFreq);
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Dclk.h765 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq);