790 uint32_t CLK_EnablePLL(uint32_t u32PllClkSrc, uint32_t u32PllFreq)  in CLK_EnablePLL()  argument
832     if((u32PllFreq <= FREQ_500MHZ) && (u32PllFreq >= FREQ_50MHZ))  in CLK_EnablePLL()
840         u32basFreq = u32PllFreq;  in CLK_EnablePLL()
855                     u32PllFreq = u32basFreq << 2;  in CLK_EnablePLL()
859                     u32PllFreq = u32basFreq << 1;  in CLK_EnablePLL()
883 …     u32Tmp3 = (u32Tmp2 > (u32PllFreq>>2)) ? u32Tmp2 - (u32PllFreq>>2) : (u32PllFreq>>2) - u32Tmp2;  in CLK_EnablePLL()
1190     uint32_t u32PllFreq = 0UL, u32PllReg;  in CLK_GetPLLClockFreq()  local
1198         u32PllFreq = 0UL;           /* PLL is in power down mode or fix low */  in CLK_GetPLLClockFreq()
1211         u32PllFreq = u32FIN;  in CLK_GetPLLClockFreq()
1229         u32PllFreq = (((u32FIN >> 2) * u32NF) / (u32NR * u32NO) << 2) * 2UL;  in CLK_GetPLLClockFreq()
1232     return u32PllFreq;  in CLK_GetPLLClockFreq()