| /hal_nuvoton-latest/m46x/StdDriver/inc/ |
| D | psio.h | 630 #define PSIO_ENABLE_PIN(psio, u32Pin) ((psio)->GNCT[(u32Pin)].GENCTL = \ argument
631 … ((psio)->GNCT[(u32Pin)].GENCTL & ~PSIO_GNCT_GENCTL_PINEN_Msk)|PSIO_GNCT_GENCTL_PINEN_Msk)
652 #define PSIO_DISABLE_PIN(psio, u32Pin) ((psio)->GNCT[(u32Pin)].GENCTL = \ argument
653 … ((psio)->GNCT[(u32Pin)].GENCTL & ~PSIO_GNCT_GENCTL_PINEN_Msk))
676 #define PSIO_SET_WIDTH(psio, u32Pin, u32InWidth, u32OutWidth) (((psio)->GNCT[(u32Pin)].DATCTL)= \ argument
677 … ((psio)->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_INDATWD_Msk & ~PSIO_GNCT_DATCTL_OUTDATWD_Msk) \
702 #define PSIO_SET_ORDER(psio, u32Pin, u32Order) (((psio)->GNCT[(u32Pin)].DATCTL)= \ argument
703 … (PSIO->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_ORDER_Msk)|(u32Order))
729 #define PSIO_SET_OUTPUT_DEPTH(psio, u32Pin, u32Depth) ((psio)->GNCT[(u32Pin)].DATCTL= \ argument
730 …(PSIO->GNCT[(u32Pin)].DATCTL & ~PSIO_GNCT_DATCTL_OUTDEPTH_Msk)|((u32Depth)<<PSIO_GNCT_DATCTL_OUTDE…
[all …]
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| D | gpio.h | 500 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) argument
547 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
548 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
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| D | acmp.h | 269 …ACMP_SELECT_P(acmp, u32ChNum, u32Pin) ((acmp)->CTL[(u32ChNum)] = ((acmp)->CTL[(u32ChNum)] & ~ACMP_… argument
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| D | clk.h | 1233 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb…
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| /hal_nuvoton-latest/m46x/StdDriver/src/ |
| D | gpio.c | 78 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs) in GPIO_EnableInt() argument
81 … port->INTTYPE = (port->INTTYPE & ~(1ul << u32Pin)) | (((u32IntAttribs >> 24) & 0xFFUL) << u32Pin); in GPIO_EnableInt()
84 …port->INTEN = (port->INTEN & ~(0x00010001ul << u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt()
103 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin) in GPIO_DisableInt() argument
106 port->INTTYPE &= ~(1UL << u32Pin); in GPIO_DisableInt()
109 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | clk.c | 1380 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb… in CLK_EnableSPDWKPin() argument
1391 … (u32Pin << CLK_PASWKCTL_WKPSEL_Pos) | u32TriggerType | u32DebounceEn | CLK_SPDWKPIN_ENABLE; in CLK_EnableSPDWKPin()
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| /hal_nuvoton-latest/m2l31x/StdDriver/src/ |
| D | gpio.c | 78 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs) in GPIO_EnableInt() argument
80 port->INTTYPE = (port->INTTYPE&~(1ul<<u32Pin)) | (((u32IntAttribs >> 24) & 0xFFUL) << u32Pin); in GPIO_EnableInt()
81 port->INTEN = (port->INTEN&~(0x00010001ul<<u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt()
100 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin) in GPIO_DisableInt() argument
102 port->INTTYPE &= ~(1UL << u32Pin); in GPIO_DisableInt()
103 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | clk.c | 1270 void CLK_EnableDPDWKPin(uint32_t u32Pin, uint32_t u32TriggerType) in CLK_EnableDPDWKPin() argument
1272 switch (u32Pin) in CLK_EnableDPDWKPin()
1325 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb… in CLK_EnableSPDWKPin() argument
1336 … (u32Pin << CLK_PAPWCTL_WKPSEL0_Pos) | u32TriggerType | u32DebounceEn | CLK_SPDWKPIN_ENABLE; in CLK_EnableSPDWKPin()
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| /hal_nuvoton-latest/m48x/StdDriver/src/ |
| D | gpio.c | 67 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs) in GPIO_EnableInt() argument
69 port->INTTYPE = (port->INTTYPE&~(1ul<<u32Pin)) | (((u32IntAttribs >> 24) & 0xFFUL) << u32Pin); in GPIO_EnableInt()
70 port->INTEN = (port->INTEN&~(0x00010001ul<<u32Pin)) | ((u32IntAttribs & 0xFFFFFFUL) << u32Pin); in GPIO_EnableInt()
87 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin) in GPIO_DisableInt() argument
89 port->INTTYPE &= ~(1UL << u32Pin); in GPIO_DisableInt()
90 port->INTEN &= ~((0x00010001UL) << u32Pin); in GPIO_DisableInt()
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| D | clk.c | 1167 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb… in CLK_EnableSPDWKPin() argument
1178 … (u32Pin << CLK_PASWKCTL_WKPSEL_Pos) | u32TriggerType | u32DebounceEn | CLK_SPDWKPIN_ENABLE; in CLK_EnableSPDWKPin()
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| /hal_nuvoton-latest/m48x/StdDriver/inc/ |
| D | gpio.h | 439 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) argument
478 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
479 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
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| D | acmp.h | 263 …ACMP_SELECT_P(acmp, u32ChNum, u32Pin) ((acmp)->CTL[(u32ChNum)] = ((acmp)->CTL[(u32ChNum)] & ~ACMP_… argument
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| D | clk.h | 695 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb…
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| /hal_nuvoton-latest/m2l31x/StdDriver/inc/ |
| D | gpio.h | 449 #define GPIO_TOGGLE(u32Pin) ((u32Pin) ^= 1) argument
456 void GPIO_EnableInt(GPIO_T *port, uint32_t u32Pin, uint32_t u32IntAttribs);
457 void GPIO_DisableInt(GPIO_T *port, uint32_t u32Pin);
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| D | acmp.h | 310 #define ACMP_SELECT_P(acmp, u32ChNum, u32Pin) \ argument
311 …mp == ACMP01) {(acmp)->CTL[u32ChNum] = ((acmp)->CTL[u32ChNum] & ~ACMP_CTL_POSSEL_Msk) | (u32Pin);}\
312 else if (acmp == ACMP2) {(acmp)->CTL[0] = ((acmp)->CTL[0] & ~ACMP_CTL_POSSEL_Msk) | (u32Pin);}
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| D | clk.h | 771 void CLK_EnableDPDWKPin(uint32_t u32Pin, uint32_t u32TriggerType);
773 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u3…
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| /hal_nuvoton-latest/dts/m46x/ |
| D | clk.h | 1263 void CLK_EnableSPDWKPin(uint32_t u32Port, uint32_t u32Pin, uint32_t u32TriggerType, uint32_t u32Deb…
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