Home
last modified time | relevance | path

Searched refs:CRC (Results 1 – 9 of 9) sorted by relevance

/hal_nuvoton-latest/m46x/StdDriver/src/
Dcrc.c50 CRC->SEED = u32Seed; in CRC_Open()
56 CRC->POLYNOMIAL = 0x1021; in CRC_Open()
59 CRC->POLYNOMIAL = 0x7; in CRC_Open()
62 CRC->POLYNOMIAL = 0x8005; in CRC_Open()
65 CRC->POLYNOMIAL = 0x04C11DB7; in CRC_Open()
68 CRC->POLYNOMIAL = 0x0ul; in CRC_Open()
72 CRC->CTL = u32Mode | u32Attribute | u32DataLen | CRC_CTL_CRCEN_Msk; in CRC_Open()
75 CRC->CTL |= CRC_CTL_CHKSINIT_Msk; in CRC_Open()
91 switch(CRC->CTL & CRC_CTL_CRCMODE_Msk) in CRC_GetChecksum()
95 u32Checksum = (CRC->CHECKSUM & 0xFFFFUL); in CRC_GetChecksum()
[all …]
/hal_nuvoton-latest/m2l31x/StdDriver/src/
Dcrc.c51 CRC->SEED = u32Seed; in CRC_Open()
57 CRC->POLYNOMIAL = 0x1021; in CRC_Open()
60 CRC->POLYNOMIAL = 0x7; in CRC_Open()
63 CRC->POLYNOMIAL = 0x8005; in CRC_Open()
66 CRC->POLYNOMIAL = 0x04C11DB7; in CRC_Open()
69 CRC->CTL = u32Mode | u32Attribute | u32DataLen | CRC_CTL_CRCEN_Msk; in CRC_Open()
72 CRC->CTL |= CRC_CTL_CHKSINIT_Msk; in CRC_Open()
88 switch(CRC->CTL & CRC_CTL_CRCMODE_Msk) in CRC_GetChecksum()
92 ret = (CRC->CHECKSUM & 0xFFFFU); in CRC_GetChecksum()
95 ret = (CRC->CHECKSUM); in CRC_GetChecksum()
[all …]
/hal_nuvoton-latest/m48x/StdDriver/src/
Dcrc.c49 CRC->SEED = u32Seed; in CRC_Open()
50 CRC->CTL = u32Mode | u32Attribute | u32DataLen | CRC_CTL_CRCEN_Msk; in CRC_Open()
53 CRC->CTL |= CRC_CTL_CHKSINIT_Msk; in CRC_Open()
69 switch(CRC->CTL & CRC_CTL_CRCMODE_Msk) in CRC_GetChecksum()
73 ret = (CRC->CHECKSUM & 0xFFFFU); in CRC_GetChecksum()
76 ret = (CRC->CHECKSUM); in CRC_GetChecksum()
79 ret = (CRC->CHECKSUM & 0xFFU); in CRC_GetChecksum()
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Dcrc.h73 #define CRC_SET_SEED(u32Seed) do{ CRC->SEED = (u32Seed); CRC->CTL |= CRC_CTL_CHKSINIT_Msk; }while…
85 #define CRC_GET_SEED() (CRC->SEED)
97 #define CRC_WRITE_DATA(u32Data) (CRC->DAT = (u32Data))
111 #define CRC_SET_POLYNOMIAL(u32Polynomial) (CRC->POLYNOMIAL = (u32Polynomial))
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dcrc.h72 #define CRC_SET_SEED(u32Seed) do{ CRC->SEED = (u32Seed); CRC->CTL |= CRC_CTL_CHKSINIT_Msk; }while…
84 #define CRC_GET_SEED() (CRC->SEED)
96 #define CRC_WRITE_DATA(u32Data) (CRC->DAT = (u32Data))
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dcrc.h72 #define CRC_SET_SEED(u32Seed) do{ CRC->SEED = (u32Seed); CRC->CTL |= CRC_CTL_CHKSINIT_Msk; }while…
84 #define CRC_GET_SEED() (CRC->SEED)
96 #define CRC_WRITE_DATA(u32Data) (CRC->DAT = (u32Data))
/hal_nuvoton-latest/m48x/Devices/M480/Include/
DM480.h395 #define CRC ((CRC_T *) CRC_BASE) macro
/hal_nuvoton-latest/m2l31x/Devices/M2L31/Include/
DM2L31.h480 #define CRC ((CRC_T *) CRC_BASE) macro
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dm460.h473 #define CRC ((CRC_T *) CRC_BASE) macro