1 /**************************************************************************//** 2 * @file crc.c 3 * @version V1.00 4 * $Revision: 3 $ 5 * $Date: 20/05/28 2:11p $ 6 * @brief M2L31 series Cyclic Redundancy Check(CRC) driver source file 7 * 8 * SPDX-License-Identifier: Apache-2.0 9 * @copyright (C) 2016-2020 Nuvoton Technology Corp. All rights reserved. 10 *****************************************************************************/ 11 #include "NuMicro.h" 12 13 /** @addtogroup Standard_Driver Standard Driver 14 @{ 15 */ 16 17 /** @addtogroup CRC_Driver CRC Driver 18 @{ 19 */ 20 21 /** @addtogroup CRC_EXPORTED_FUNCTIONS CRC Exported Functions 22 @{ 23 */ 24 25 /** 26 * @brief CRC Open 27 * 28 * @param[in] u32Mode CRC operation polynomial mode. Valid values are: 29 * - \ref CRC_CCITT 30 * - \ref CRC_8 31 * - \ref CRC_16 32 * - \ref CRC_32 33 * @param[in] u32Attribute CRC operation data attribute. Valid values are combined with: 34 * - \ref CRC_CHECKSUM_COM 35 * - \ref CRC_CHECKSUM_RVS 36 * - \ref CRC_WDATA_COM 37 * - \ref CRC_WDATA_RVS 38 * @param[in] u32Seed Seed value. 39 * @param[in] u32DataLen CPU Write Data Length. Valid values are: 40 * - \ref CRC_CPU_WDATA_8 41 * - \ref CRC_CPU_WDATA_16 42 * - \ref CRC_CPU_WDATA_32 43 * 44 * @return None 45 * 46 * @details This function will enable the CRC controller by specify CRC operation mode, attribute, initial seed and write data length. \n 47 * After that, user can start to perform CRC calculate by calling CRC_WRITE_DATA macro or CRC_DAT register directly. 48 */ CRC_Open(uint32_t u32Mode,uint32_t u32Attribute,uint32_t u32Seed,uint32_t u32DataLen)49void CRC_Open(uint32_t u32Mode, uint32_t u32Attribute, uint32_t u32Seed, uint32_t u32DataLen) 50 { 51 CRC->SEED = u32Seed; 52 53 switch(u32Mode) 54 { 55 case CRC_CCITT: 56 u32Mode = CRC_16; 57 CRC->POLYNOMIAL = 0x1021; 58 break; 59 case CRC_8: 60 CRC->POLYNOMIAL = 0x7; 61 break; 62 case CRC_16: 63 CRC->POLYNOMIAL = 0x8005; 64 break; 65 case CRC_32: 66 CRC->POLYNOMIAL = 0x04C11DB7; 67 break; 68 } 69 CRC->CTL = u32Mode | u32Attribute | u32DataLen | CRC_CTL_CRCEN_Msk; 70 71 /* Setting CHKSINIT bit will reload the initial seed value(CRC_SEED register) to CRC controller */ 72 CRC->CTL |= CRC_CTL_CHKSINIT_Msk; 73 } 74 75 /** 76 * @brief Get CRC Checksum 77 * 78 * @param[in] None 79 * 80 * @return Checksum Result 81 * 82 * @details This macro gets the CRC checksum result by current CRC polynomial mode. 83 */ CRC_GetChecksum(void)84uint32_t CRC_GetChecksum(void) 85 { 86 uint32_t ret; 87 88 switch(CRC->CTL & CRC_CTL_CRCMODE_Msk) 89 { 90 case CRC_CCITT: 91 case CRC_16: 92 ret = (CRC->CHECKSUM & 0xFFFFU); 93 break; 94 case CRC_32: 95 ret = (CRC->CHECKSUM); 96 break; 97 case CRC_8: 98 ret = (CRC->CHECKSUM & 0xFFU); 99 break; 100 default: 101 ret = 0U; 102 break; 103 } 104 105 return ret; 106 } 107 108 /*@}*/ /* end of group CRC_EXPORTED_FUNCTIONS */ 109 110 /*@}*/ /* end of group CRC_Driver */ 111 112 /*@}*/ /* end of group Standard_Driver */ 113 114 /*** (C) COPYRIGHT 2016 Nuvoton Technology Corp. ***/ 115