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Searched refs:CLK_CLKSEL3_UART5SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/src/
Duart.c237 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_Open()
393 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_SetLineConfig()
508 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m46x/StdDriver/src/
Duart.c229 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_Open()
387 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_SetLineConfig()
502 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART5SEL_Msk) >> CLK_CLKSEL3_UART5SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h230 #define CLK_CLKSEL3_UART5SEL_HXT (0x0UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
231 #define CLK_CLKSEL3_UART5SEL_LXT (0x2UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
232 #define CLK_CLKSEL3_UART5SEL_PLL (0x1UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
233 #define CLK_CLKSEL3_UART5SEL_HIRC (0x3UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1374 #define CLK_CLKSEL3_UART5SEL_Pos (30) /*!< CLK… macro
1375 #define CLK_CLKSEL3_UART5SEL_Msk (0x3ul << CLK_CLKSEL3_UART5SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h1957 #define CLK_CLKSEL3_UART5SEL_Pos (30) /*!< CLK… macro
1958 #define CLK_CLKSEL3_UART5SEL_Msk (0x3ul << CLK_CLKSEL3_UART5SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h1958 #define CLK_CLKSEL3_UART5SEL_Pos (30) /*!< CLK… macro
1959 #define CLK_CLKSEL3_UART5SEL_Msk (0x3ul << CLK_CLKSEL3_UART5SEL_Pos) /*!< CLK…
Dclk.h304 #define CLK_CLKSEL3_UART5SEL_HXT (0x0UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
305 #define CLK_CLKSEL3_UART5SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
306 #define CLK_CLKSEL3_UART5SEL_LXT (0x2UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
307 #define CLK_CLKSEL3_UART5SEL_HIRC (0x3UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h304 #define CLK_CLKSEL3_UART5SEL_HXT (0x0UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
305 #define CLK_CLKSEL3_UART5SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
306 #define CLK_CLKSEL3_UART5SEL_LXT (0x2UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…
307 #define CLK_CLKSEL3_UART5SEL_HIRC (0x3UL << CLK_CLKSEL3_UART5SEL_Pos) /*!< Select UAR…