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Searched refs:CLK_CLKSEL3_UART3SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/src/
Duart.c223 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_Open()
379 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_SetLineConfig()
494 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m46x/StdDriver/src/
Duart.c221 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_Open()
379 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_SetLineConfig()
494 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART3SEL_Msk) >> CLK_CLKSEL3_UART3SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h220 #define CLK_CLKSEL3_UART3SEL_HXT (0x0UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
221 #define CLK_CLKSEL3_UART3SEL_LXT (0x2UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
222 #define CLK_CLKSEL3_UART3SEL_PLL (0x1UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
223 #define CLK_CLKSEL3_UART3SEL_HIRC (0x3UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1368 #define CLK_CLKSEL3_UART3SEL_Pos (26) /*!< CLK… macro
1369 #define CLK_CLKSEL3_UART3SEL_Msk (0x3ul << CLK_CLKSEL3_UART3SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h1951 #define CLK_CLKSEL3_UART3SEL_Pos (26) /*!< CLK… macro
1952 #define CLK_CLKSEL3_UART3SEL_Msk (0x3ul << CLK_CLKSEL3_UART3SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h1952 #define CLK_CLKSEL3_UART3SEL_Pos (26) /*!< CLK… macro
1953 #define CLK_CLKSEL3_UART3SEL_Msk (0x3ul << CLK_CLKSEL3_UART3SEL_Pos) /*!< CLK…
Dclk.h294 #define CLK_CLKSEL3_UART3SEL_HXT (0x0UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
295 #define CLK_CLKSEL3_UART3SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
296 #define CLK_CLKSEL3_UART3SEL_LXT (0x2UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
297 #define CLK_CLKSEL3_UART3SEL_HIRC (0x3UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h294 #define CLK_CLKSEL3_UART3SEL_HXT (0x0UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
295 #define CLK_CLKSEL3_UART3SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
296 #define CLK_CLKSEL3_UART3SEL_LXT (0x2UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…
297 #define CLK_CLKSEL3_UART3SEL_HIRC (0x3UL << CLK_CLKSEL3_UART3SEL_Pos) /*!< Select UAR…