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Searched refs:CLK_CLKSEL3_UART2SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/src/
Duart.c216 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_Open()
372 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_SetLineConfig()
487 u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m46x/StdDriver/src/
Duart.c217 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_Open()
375 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_SetLineConfig()
490 … u32UartClkSrcSel = (CLK->CLKSEL3 & CLK_CLKSEL3_UART2SEL_Msk) >> CLK_CLKSEL3_UART2SEL_Pos; in UART_SelectIrDAMode()
/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h215 #define CLK_CLKSEL3_UART2SEL_HXT (0x0UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
216 #define CLK_CLKSEL3_UART2SEL_LXT (0x2UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
217 #define CLK_CLKSEL3_UART2SEL_PLL (0x1UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
218 #define CLK_CLKSEL3_UART2SEL_HIRC (0x3UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1365 #define CLK_CLKSEL3_UART2SEL_Pos (24) /*!< CLK… macro
1366 #define CLK_CLKSEL3_UART2SEL_Msk (0x3ul << CLK_CLKSEL3_UART2SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h1948 #define CLK_CLKSEL3_UART2SEL_Pos (24) /*!< CLK… macro
1949 #define CLK_CLKSEL3_UART2SEL_Msk (0x3ul << CLK_CLKSEL3_UART2SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h1949 #define CLK_CLKSEL3_UART2SEL_Pos (24) /*!< CLK… macro
1950 #define CLK_CLKSEL3_UART2SEL_Msk (0x3ul << CLK_CLKSEL3_UART2SEL_Pos) /*!< CLK…
Dclk.h289 #define CLK_CLKSEL3_UART2SEL_HXT (0x0UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
290 #define CLK_CLKSEL3_UART2SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
291 #define CLK_CLKSEL3_UART2SEL_LXT (0x2UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
292 #define CLK_CLKSEL3_UART2SEL_HIRC (0x3UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h289 #define CLK_CLKSEL3_UART2SEL_HXT (0x0UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
290 #define CLK_CLKSEL3_UART2SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
291 #define CLK_CLKSEL3_UART2SEL_LXT (0x2UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…
292 #define CLK_CLKSEL3_UART2SEL_HIRC (0x3UL << CLK_CLKSEL3_UART2SEL_Pos) /*!< Select UAR…