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Searched refs:CLK_CLKSEL2_QSPI0SEL_Pos (Results 1 – 8 of 8) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h146 #define CLK_CLKSEL2_QSPI0SEL_HXT (0x0UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
147 #define CLK_CLKSEL2_QSPI0SEL_PLL (0x1UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
148 #define CLK_CLKSEL2_QSPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
149 #define CLK_CLKSEL2_QSPI0SEL_PCLK0 (0x2UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
/hal_nuvoton-latest/m2l31x/StdDriver/inc/
Dclk.h172 #define CLK_CLKSEL2_QSPI0SEL_HXT (0x0UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
173 #define CLK_CLKSEL2_QSPI0SEL_PLL (0x1UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
174 #define CLK_CLKSEL2_QSPI0SEL_PCLK0 (0x2UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
175 #define CLK_CLKSEL2_QSPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1320 #define CLK_CLKSEL2_QSPI0SEL_Pos (2) /*!< CLK… macro
1321 #define CLK_CLKSEL2_QSPI0SEL_Msk (0x3ul << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m2l31x/Devices/M2L31/Include/
Dclk_reg.h1804 #define CLK_CLKSEL2_QSPI0SEL_Pos (2) /*!< CLK… macro
1805 #define CLK_CLKSEL2_QSPI0SEL_Msk (0x3ul << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h1888 #define CLK_CLKSEL2_QSPI0SEL_Pos (2) /*!< CLK… macro
1889 #define CLK_CLKSEL2_QSPI0SEL_Msk (0x3ul << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h1889 #define CLK_CLKSEL2_QSPI0SEL_Pos (2) /*!< CLK… macro
1890 #define CLK_CLKSEL2_QSPI0SEL_Msk (0x3ul << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< CLK…
Dclk.h179 #define CLK_CLKSEL2_QSPI0SEL_HXT (0x0UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
180 #define CLK_CLKSEL2_QSPI0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
181 #define CLK_CLKSEL2_QSPI0SEL_PCLK0 (0x2UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
182 #define CLK_CLKSEL2_QSPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h179 #define CLK_CLKSEL2_QSPI0SEL_HXT (0x0UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
180 #define CLK_CLKSEL2_QSPI0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
181 #define CLK_CLKSEL2_QSPI0SEL_PCLK0 (0x2UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…
182 #define CLK_CLKSEL2_QSPI0SEL_HIRC (0x3UL << CLK_CLKSEL2_QSPI0SEL_Pos) /*!< Select QSP…