Searched refs:CLK_CLKSEL1_TMR2SEL_Pos (Results 1 – 11 of 11) sorted by relevance
110 #define CLK_CLKSEL1_TMR2SEL_HXT (0x0UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…111 #define CLK_CLKSEL1_TMR2SEL_LXT (0x1UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…112 #define CLK_CLKSEL1_TMR2SEL_LIRC (0x5UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…113 #define CLK_CLKSEL1_TMR2SEL_HIRC (0x7UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…114 #define CLK_CLKSEL1_TMR2SEL_PCLK1 (0x2UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…115 #define CLK_CLKSEL1_TMR2SEL_EXT (0x3UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…
142 #define CLK_CLKSEL1_TMR2SEL_HXT (0x0UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…143 #define CLK_CLKSEL1_TMR2SEL_LXT (0x1UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…144 #define CLK_CLKSEL1_TMR2SEL_PCLK1 (0x2UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…145 #define CLK_CLKSEL1_TMR2SEL_EXT (0x3UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…146 #define CLK_CLKSEL1_TMR2SEL_LIRC (0x5UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…147 #define CLK_CLKSEL1_TMR2SEL_HIRC (0x7UL << CLK_CLKSEL1_TMR2SEL_Pos) /*!< Select TMR…
1868 #define CLK_CLKSEL1_TMR2SEL_Pos (16) /*!< CLK… macro1869 #define CLK_CLKSEL1_TMR2SEL_Msk (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos) /*!< CLK…
1296 #define CLK_CLKSEL1_TMR2SEL_Pos (16) /*!< CLK… macro1297 #define CLK_CLKSEL1_TMR2SEL_Msk (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos) /*!< CLK…
253 u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR2SEL_Msk) >> CLK_CLKSEL1_TMR2SEL_Pos; in TIMER_GetModuleClock()
273 u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR2SEL_Msk) >> CLK_CLKSEL1_TMR2SEL_Pos; in TIMER_GetModuleClock()
285 u32Src = (CLK->CLKSEL1 & CLK_CLKSEL1_TMR2SEL_Msk) >> CLK_CLKSEL1_TMR2SEL_Pos; in TIMER_GetModuleClock()
1789 #define CLK_CLKSEL1_TMR2SEL_Pos (16) /*!< CLK… macro1790 #define CLK_CLKSEL1_TMR2SEL_Msk (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos) /*!< CLK…
1867 #define CLK_CLKSEL1_TMR2SEL_Pos (16) /*!< CLK… macro1868 #define CLK_CLKSEL1_TMR2SEL_Msk (0x7ul << CLK_CLKSEL1_TMR2SEL_Pos) /*!< CLK…
