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Searched refs:CLK_CLKSEL0_SDH0SEL_Pos (Results 1 – 6 of 6) sorted by relevance

/hal_nuvoton-latest/m48x/StdDriver/inc/
Dclk.h78 #define CLK_CLKSEL0_SDH0SEL_HXT (0x0UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
79 #define CLK_CLKSEL0_SDH0SEL_PLL (0x1UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
80 #define CLK_CLKSEL0_SDH0SEL_HIRC (0x3UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
81 #define CLK_CLKSEL0_SDH0SEL_HCLK (0x2UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
/hal_nuvoton-latest/m48x/Devices/M480/Include/
Dclk_reg.h1281 #define CLK_CLKSEL0_SDH0SEL_Pos (20) /*!< CLK… macro
1282 #define CLK_CLKSEL0_SDH0SEL_Msk (0x3ul << CLK_CLKSEL0_SDH0SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/m46x/Devices/M460/Include/
Dclk_reg.h1837 #define CLK_CLKSEL0_SDH0SEL_Pos (20) /*!< CLK… macro
1838 #define CLK_CLKSEL0_SDH0SEL_Msk (0x3ul << CLK_CLKSEL0_SDH0SEL_Pos) /*!< CLK…
/hal_nuvoton-latest/dts/m46x/
Dclk_reg.h1838 #define CLK_CLKSEL0_SDH0SEL_Pos (20) /*!< CLK… macro
1839 #define CLK_CLKSEL0_SDH0SEL_Msk (0x3ul << CLK_CLKSEL0_SDH0SEL_Pos) /*!< CLK…
Dclk.h82 #define CLK_CLKSEL0_SDH0SEL_HXT (0x0UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
83 #define CLK_CLKSEL0_SDH0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
84 #define CLK_CLKSEL0_SDH0SEL_HCLK (0x2UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
85 #define CLK_CLKSEL0_SDH0SEL_HIRC (0x3UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
/hal_nuvoton-latest/m46x/StdDriver/inc/
Dclk.h82 #define CLK_CLKSEL0_SDH0SEL_HXT (0x0UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
83 #define CLK_CLKSEL0_SDH0SEL_PLL_DIV2 (0x1UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
84 #define CLK_CLKSEL0_SDH0SEL_HCLK (0x2UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…
85 #define CLK_CLKSEL0_SDH0SEL_HIRC (0x3UL << CLK_CLKSEL0_SDH0SEL_Pos) /*!< Select SDH…