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Searched refs:temp (Results 1 – 25 of 28) sorted by relevance

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/hal_microchip-latest/mec5/drivers/
Dmec_espi_pc.c60 uint32_t temp = iobase->PCSTS & (MEC_ESPI_IO_PCSTS_PCEN_VAL_Msk in mec_hal_espi_pc_en_status() local
63 return (temp >> MEC_ESPI_IO_PCSTS_PCEN_VAL_Pos); in mec_hal_espi_pc_en_status()
72 uint32_t temp = iobase->PCSTS & (MEC_ESPI_IO_PCSTS_PCBM_VAL_Msk in mec_hal_espi_pc_bm_status() local
75 return (temp >> MEC_ESPI_IO_PCSTS_PCBM_VAL_Pos); in mec_hal_espi_pc_bm_status()
81 uint32_t temp = iobase->PCSTS; in mec_hal_espi_pc_status() local
83 if (temp & MEC_BIT(MEC_ESPI_IO_PCSTS_EC_BUS_ERR_Pos)) { in mec_hal_espi_pc_status()
86 if (temp & MEC_BIT(MEC_ESPI_IO_PCSTS_PCEN_VAL_Pos)) { in mec_hal_espi_pc_status()
89 if (temp & MEC_BIT(MEC_ESPI_IO_PCSTS_PCEN_CHG_Pos)) { in mec_hal_espi_pc_status()
92 if (temp & MEC_BIT(MEC_ESPI_IO_PCSTS_PCBM_VAL_Pos)) { in mec_hal_espi_pc_status()
95 if (temp & MEC_BIT(MEC_ESPI_IO_PCSTS_PCBMEN_CHG_Pos)) { in mec_hal_espi_pc_status()
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Dmec_pcr.c293 uint32_t bpos, idx, temp; in mec_hal_pcr_blk_reset() local
304 temp = MEC_PCR->RST_EN[idx]; in mec_hal_pcr_blk_reset()
307 return temp; in mec_hal_pcr_blk_reset()
444 uint32_t temp = 0; in mec_hal_pcr_clk32k_is_config() local
482 mec_hal_gpio_get_property(MEC_PIN_0165, MEC_GPIO_MUX_PROP_ID, (uint8_t *)&temp); in mec_hal_pcr_clk32k_is_config()
483 if (temp != MEC_GPIO_PROP_MUX_FUNC1) { in mec_hal_pcr_clk32k_is_config()
495 uint32_t temp = 0; in check_crystal() local
521 temp = MEC_PCR->SIS32K; in check_crystal()
522 } while ((temp & (MEC_BIT(MEC_PCR_SIS32K_PD_FAIL_Pos) in check_crystal()
529 if (temp & MEC_BIT(MEC_PCR_SIS32K_PD_FAIL_Pos)) { in check_crystal()
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Dmec_espi.c23 uint32_t temp = 0; in set_supported_channels() local
26 temp |= MEC_BIT(MEC_ESPI_IO_CAP0_PC_SUPP_Pos); in set_supported_channels()
30 temp |= MEC_BIT(MEC_ESPI_IO_CAP0_VW_SUPP_Pos); in set_supported_channels()
34 temp |= MEC_BIT(MEC_ESPI_IO_CAP0_OOB_SUPP_Pos); in set_supported_channels()
38 temp |= MEC_BIT(MEC_ESPI_IO_CAP0_FC_SUPP_Pos); in set_supported_channels()
41 iobase->CAP0 = (uint8_t)((iobase->CAP0 & ~mask) | temp); in set_supported_channels()
47 uint32_t temp = capabilities & MEC_ESPI_CFG_MAX_SUPP_FREQ_MSK; in set_supported_max_freq() local
49 temp >>= MEC_ESPI_CFG_MAX_SUPP_FREQ_POS; in set_supported_max_freq()
50 temp = (temp << MEC_ESPI_IO_CAP1_MAX_FREQ_SUPP_Pos) & MEC_ESPI_IO_CAP1_MAX_FREQ_SUPP_Msk; in set_supported_max_freq()
52 iobase->CAP1 = (uint8_t)((iobase->CAP1 & ~mask) | temp); in set_supported_max_freq()
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Dmec_bbled.c105 uint32_t temp = (bbcfg & MEC_BBLED_CFG_WDT_RELOAD_MSK) >> MEC_BBLED_CFG_WDT_RELOAD_POS; in bbled_set_wdt_reload() local
108 ((temp << MEC_BBLED_CONFIG_WDTRLD_Pos) & MEC_BBLED_CONFIG_WDTRLD_Msk)); in bbled_set_wdt_reload()
331 uint32_t temp = 0; in mec_hal_bbled_breathe_config() local
343 temp = (((uint32_t)br_cfg->min_hold << MEC_BBLED_LIMITS_MIN_Pos) & MEC_BBLED_LIMITS_MIN_Msk); in mec_hal_bbled_breathe_config()
344 temp |= (((uint32_t)br_cfg->max_hold << MEC_BBLED_LIMITS_MAX_Pos) & MEC_BBLED_LIMITS_MAX_Msk); in mec_hal_bbled_breathe_config()
345 regs->LIMITS = temp; in mec_hal_bbled_breathe_config()
347 temp = ((uint32_t)br_cfg->lo_delay << MEC_BBLED_DELAY_LO_Pos) & MEC_BBLED_DELAY_LO_Msk; in mec_hal_bbled_breathe_config()
348 temp |= (((uint32_t)br_cfg->hi_delay << MEC_BBLED_DELAY_HI_Pos) & MEC_BBLED_DELAY_HI_Msk); in mec_hal_bbled_breathe_config()
349 regs->DELAY = temp; in mec_hal_bbled_breathe_config()
360 uint32_t temp = 0; in mec_hal_bbled_breathe_config_get() local
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Dmec_uart.c97 uint8_t temp = (MEC_BIT(MEC_UART_FCR_EXRF_Pos) | MEC_BIT(MEC_UART_FCR_CLR_RX_FIFO_Pos) in uart_prog_fifos() local
101 base->FCR = temp; in uart_prog_fifos()
102 base->SCR = temp; in uart_prog_fifos()
104 temp = uart_fcr_tbl[fifo_mode]; in uart_prog_fifos()
106 base->FCR = temp; in uart_prog_fifos()
107 base->SCR = temp; in uart_prog_fifos()
217 uint8_t temp = 0u; in mec_hal_uart_word_len_get() local
223 temp = base->LCR & MEC_UART_LCR_WORD_LEN_Msk; in mec_hal_uart_word_len_get()
225 if (uart_word_len_tbl[i] == temp) { in mec_hal_uart_word_len_get()
287 uint32_t temp = 0; in prog_cfg1() local
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Dmec_espi_vw.c418 uint32_t temp = 0; in mec_hal_espi_vw_ct_irq_sel_set_all() local
427 temp = irq_sels & 0x7u; in mec_hal_espi_vw_ct_irq_sel_set_all()
429 if (temp >= MEC_VW_CT_IXLAT_TBL_ENTRIES) { in mec_hal_espi_vw_ct_irq_sel_set_all()
433 temp = vw_ct_ien_xlat_tbl[temp] & MEC_ESPI_VW_CTVW_SRC_ISELS_SRC0_IRQ_SEL_Msk; in mec_hal_espi_vw_ct_irq_sel_set_all()
434 r |= (temp << (n * 8u)); in mec_hal_espi_vw_ct_irq_sel_set_all()
512 uint32_t temp = ctvw->HIRSS & (uint32_t)~MEC_ESPI_VW_CTVW_HIRSS_HOST_IDX_Msk; in mec_hal_espi_vw_ct_host_index_set() local
514 temp |= host_index; in mec_hal_espi_vw_ct_host_index_set()
515 ctvw->HIRSS = temp; in mec_hal_espi_vw_ct_host_index_set()
528 uint32_t temp = ctvw->HIRSS; in mec_hal_espi_vw_ct_reset_source_get() local
530 temp = (temp & MEC_ESPI_VW_CTVW_HIRSS_RST_SRC_Msk) >> MEC_ESPI_VW_CTVW_HIRSS_RST_SRC_Pos; in mec_hal_espi_vw_ct_reset_source_get()
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Dmec_adc.c42 uint32_t temp = 4u; in mec_hal_adc_init() local
60 while (temp--) { in mec_hal_adc_init()
75 temp = (((uint32_t)cfg->sample_clk_hi_time << MEC_ADC_CONFIG_CHTM_Pos) in mec_hal_adc_init()
77 temp |= (((uint32_t)cfg->sample_clk_lo_time << MEC_ADC_CONFIG_CLTM_Pos) in mec_hal_adc_init()
80 | MEC_ADC_CONFIG_CHTM_Msk)) | temp; in mec_hal_adc_init()
91 temp = regs->DELAY & in mec_hal_adc_init()
93 temp |= (((uint32_t)cfg->rpt_start_delay << MEC_ADC_DELAY_RSTART_DLY_Pos) in mec_hal_adc_init()
95 temp |= (((uint32_t)cfg->rpt_cycle_delay << MEC_ADC_DELAY_RPT_DLY_Pos) in mec_hal_adc_init()
174 uint32_t temp = regs->VREF_CHAN; in mec_hal_adc_chan_vref_select() local
176 temp &= ~(0x3u << (chan_id * 2u)); in mec_hal_adc_chan_vref_select()
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Dmec_bdp.c43 uint32_t temp = 0; in mec_hal_bdp_init() local
59 temp = (cfg_flags & MEC5_BDP_CFG_FIFO_THRES_MSK) >> MEC5_BDP_CFG_FIFO_THRES_POS; in mec_hal_bdp_init()
61 | ((temp << MEC_BDP_CFG_REG_FIFO_THRH_POS) & MEC_BDP_CFG_REG_FIFO_THRH_MSK); in mec_hal_bdp_init()
135 uint32_t temp; in mec_hal_bdp_fifo_thresh_set() local
141 temp = (cfg_thrh & MEC5_BDP_CFG_FIFO_THRES_MSK) >> MEC5_BDP_CFG_FIFO_THRES_POS; in mec_hal_bdp_fifo_thresh_set()
143 | ((temp << MEC_BDP_CFG_REG_FIFO_THRH_POS) & MEC_BDP_CFG_REG_FIFO_THRH_MSK); in mec_hal_bdp_fifo_thresh_set()
Dmec_espi_host_dev.c221 uint32_t temp = base->EC_LDN_MSK[idx]; in mec_hal_espi_iobar_mask_set() local
223 temp &= ~(MEC_ESPI_IO_EC_LDN_MSK_MSK_Msk << MEC_ESPI_IO_EC_LDN_MSK_MSK_Pos); in mec_hal_espi_iobar_mask_set()
224 temp |= (((uint32_t)mask << MEC_ESPI_IO_EC_LDN_MSK_MSK_Pos) | MEC_ESPI_IO_EC_LDN_MSK_MSK_Msk); in mec_hal_espi_iobar_mask_set()
226 *((volatile uint32_t *)&base->EC_LDN_MSK[idx]) = temp; in mec_hal_espi_iobar_mask_set()
272 uint32_t temp; in mec_hal_espi_sram_bar_cfg() local
281 temp = barcfg->size; in mec_hal_espi_sram_bar_cfg()
282 temp = (temp << MEC_ESPI_MEM_EC_SRAM_BAR_VASZ_SIZE_Pos) in mec_hal_espi_sram_bar_cfg()
284 temp |= (((uint32_t)barcfg->access << MEC_ESPI_MEM_EC_SRAM_BAR_VASZ_ACCESS_Pos) & in mec_hal_espi_sram_bar_cfg()
286 base->EC_SRAM_BAR[sram_bar_id].VASZ = (uint16_t)temp; in mec_hal_espi_sram_bar_cfg()
Dmec_espi_oob.c162 uint32_t temp, lenb, maxlen; in mec_hal_espi_oob_buffer_set() local
184 temp = iobase->OOBRXL & (uint32_t)~(MEC_ESPI_IO_OOBRXL_RX_BUF_LEN_Msk); in mec_hal_espi_oob_buffer_set()
185 temp |= ((lenb << MEC_ESPI_IO_OOBRXL_RX_BUF_LEN_Pos) & MEC_ESPI_IO_OOBRXL_RX_BUF_LEN_Msk); in mec_hal_espi_oob_buffer_set()
186 iobase->OOBRXL = temp; in mec_hal_espi_oob_buffer_set()
189 temp = iobase->OOBTXL & (uint32_t)~(MEC_ESPI_IO_OOBTXL_TX_MSG_LEN_Msk); in mec_hal_espi_oob_buffer_set()
190 temp |= ((lenb << MEC_ESPI_IO_OOBTXL_TX_MSG_LEN_Pos) & MEC_ESPI_IO_OOBTXL_TX_MSG_LEN_Msk); in mec_hal_espi_oob_buffer_set()
191 iobase->OOBTXL = temp; in mec_hal_espi_oob_buffer_set()
Dmec_vci.c223 uint32_t temp = 0; in mec_hal_vci_in_polarity() local
229 temp = regs->VCI_POLARITY; in mec_hal_vci_in_polarity()
230 temp &= (uint32_t)~(vci_in_bitmap); in mec_hal_vci_in_polarity()
231 temp |= (polarity_bitmap & vci_in_bitmap); in mec_hal_vci_in_polarity()
232 regs->VCI_POLARITY = temp; in mec_hal_vci_in_polarity()
Dmec_ecs.c78 uint32_t msk, temp, val; in mec_hal_ecs_debug_port() local
101 temp = MEC_ECS->DBG_CTRL & ~msk; in mec_hal_ecs_debug_port()
102 temp |= val; in mec_hal_ecs_debug_port()
103 MEC_ECS->DBG_CTRL = temp; in mec_hal_ecs_debug_port()
Dmec_ps2.c106 uint32_t temp = 0u; in mec_hal_ps2_init() local
124 temp = ((flags & MEC_PS2_FLAGS_PARITY_MSK) >> MEC_PS2_FLAGS_PARITY_POS); in mec_hal_ps2_init()
125 ctrl |= (uint8_t)((temp << MEC_PS2_CTRL_PARITY_Pos) & MEC_PS2_CTRL_PARITY_Msk); in mec_hal_ps2_init()
127 temp = ((flags & MEC_PS2_FLAGS_STOP_BITS_MSK) >> MEC_PS2_FLAGS_STOP_BITS_POS); in mec_hal_ps2_init()
128 ctrl |= (uint8_t)((temp << MEC_PS2_CTRL_STOP_Pos) & MEC_PS2_CTRL_STOP_Msk); in mec_hal_ps2_init()
Dmec_eeprom.c277 uint32_t rexe = 0, temp = 0; in mec_hal_eeprom_xfr_start() local
303 temp = MEC5_EEPROM_WRITE_PAGE_SIZE - (rexe % MEC5_EEPROM_WRITE_PAGE_SIZE); in mec_hal_eeprom_xfr_start()
304 if ((uint32_t)xfrsz > temp) { in mec_hal_eeprom_xfr_start()
305 xfrsz = (uint8_t)temp; in mec_hal_eeprom_xfr_start()
Dmec_tach.c54 uint32_t ctrl = 0, temp = 0; in mec_hal_tach_init() local
77 temp = (flags & MEC5_TACH_CFG_INTERVAL_EDGES_MSK) >> MEC5_TACH_CFG_INTERVAL_EDGES_POS; in mec_hal_tach_init()
78 ctrl |= ((temp << MEC_TACH_CTRL_EDGES_Pos) & MEC_TACH_CTRL_EDGES_Msk); in mec_hal_tach_init()
Dmec_kbc.c252 uint32_t temp = 0u, result = 0u; in mec_kbc_girq_result() local
262 temp = mec_hal_girq_result_get(MEC_KBC_GIRQ); in mec_kbc_girq_result()
263 if (temp & MEC_BIT(MEC_KBC_IBF_GIRQ_POS)) { in mec_kbc_girq_result()
266 if (temp & MEC_BIT(MEC_KBC_OBE_GIRQ_POS)) { in mec_kbc_girq_result()
Dmec_acpi_ec.c213 uint32_t temp = 0u, result = 0u, ibf_bit = 0, obe_bit = 0; in mec_hal_acpi_ec_girq_result() local
223 temp = mec_hal_girq_result_get(MEC_ACPI_EC_GIRQ); in mec_hal_acpi_ec_girq_result()
224 if (temp & MEC_BIT(ibf_bit)) { in mec_hal_acpi_ec_girq_result()
227 if (temp & MEC_BIT(obe_bit)) { in mec_hal_acpi_ec_girq_result()
Dmec_qspi.c841 uint32_t temp = (uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_1B; in qspi_ldma_cfg1() local
844 temp = (uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_4B; in qspi_ldma_cfg1()
846 rctrl |= (temp << MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_Pos); in qspi_ldma_cfg1()
848 temp = (uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_1B; in qspi_ldma_cfg1()
850 temp = (uint32_t)MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_4B; in qspi_ldma_cfg1()
852 wctrl |= (temp << MEC_QSPI_LDMA_CHAN_CTRL_ACCSZ_Pos); in qspi_ldma_cfg1()
/hal_microchip-latest/mpfs/drivers/mss/mss_usb/
Dmss_usb_host_cif.h505 uint32_t* temp; in MSS_USBH_CIF_load_tx_fifo() local
509 temp =in_data; in MSS_USBH_CIF_load_tx_fifo()
514 USB->FIFO[ep_num].WORD.VALUE = (uint32_t)temp[idx]; in MSS_USBH_CIF_load_tx_fifo()
528 uint32_t* temp; in MSS_USBH_CIF_read_rx_fifo() local
532 temp = out_data; in MSS_USBH_CIF_read_rx_fifo()
537 temp[idx] = USB->FIFO[ep_num].WORD.VALUE; in MSS_USBH_CIF_read_rx_fifo()
Dmss_usb_common_reg_io.h967 uint32_t* temp; in MSS_USB_CIF_load_tx_fifo() local
971 temp = in_data; in MSS_USB_CIF_load_tx_fifo()
976 USB->FIFO[ep_num].WORD.VALUE = (uint32_t)temp[idx]; in MSS_USB_CIF_load_tx_fifo()
994 volatile uint32_t* temp; in MSS_USB_CIF_read_rx_fifo() local
998 temp = out_data; in MSS_USB_CIF_read_rx_fifo()
1003 temp[idx] = USB->FIFO[ep_num].WORD.VALUE; in MSS_USB_CIF_read_rx_fifo()
1050 uint16_t temp; in MSS_USB_CIF_tx_ep_set_fifo_size() local
1057 temp = (fifo_size / MIN_EP_FIFO_SZ); in MSS_USB_CIF_tx_ep_set_fifo_size()
1058 while (!(temp & MSS_USB_WORD_BIT_0_MASK)) in MSS_USB_CIF_tx_ep_set_fifo_size()
1060 temp >>= 1u; in MSS_USB_CIF_tx_ep_set_fifo_size()
[all …]
/hal_microchip-latest/mpfs/mpfs_hal/common/
Dmss_axiswitch.c134 uint32_t temp = 0u; in MSS_AXISW_read_rate() local
145 temp = AXISW->DATA; in MSS_AXISW_read_rate()
147 *peak_rate = (temp & AXISW_DATA_PEAKRT_MASK) >> AXISW_DATA_PEAKRT; in MSS_AXISW_read_rate()
148 *xct_rate = (temp & AXISW_DATA_XCTRT_MASK) >> AXISW_DATA_XCTRT; in MSS_AXISW_read_rate()
Dmss_mpu.c244 uint64_t temp = size, cnt=0ULL; in MSS_MPU_configure() local
252 while((0 == (temp & 0x01U))) in MSS_MPU_configure()
255 temp >>= 1U; in MSS_MPU_configure()
/hal_microchip-latest/mpfs/drivers/mss/mss_mmc/
Dmss_mmc.c3240 uint32_t temp; in sdcard_oper_config() local
3339 temp = MMC->SRS04; in sdcard_oper_config()
3406 temp = MMC->SRS11; in sdcard_oper_config()
3407 temp &= ~(uint32_t)SRS11_SD_CLOCK_ENABLE; in sdcard_oper_config()
3408 MMC->SRS11 = temp; in sdcard_oper_config()
3440 temp = MMC->SRS11; in sdcard_oper_config()
3441 temp |= (uint32_t)SRS11_SD_CLOCK_ENABLE; in sdcard_oper_config()
3442 MMC->SRS11 = temp; in sdcard_oper_config()
3654 uint32_t temp; in sdio_oper_config() local
3752 temp = MMC->SRS11; in sdio_oper_config()
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/hal_microchip-latest/mpfs/drivers/mss/mss_can/
Dmss_can.c64 uint32_t temp; in MSS_CAN_init() local
109 temp = pcan_config->CFG_SJW; in MSS_CAN_init()
110 if ((temp > pcan_config->CFG_TSEG1) || in MSS_CAN_init()
111 (temp > pcan_config->CFG_TSEG2)) in MSS_CAN_init()
/hal_microchip-latest/mpfs/soc_config_generator/
Dmpfs_configuration_generator.py563 temp = in_path
572 filename = temp

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