Searched refs:IER (Results 1 – 9 of 9) sorted by relevance
366 this_uart->hw_reg->IER |= ETBEI_MASK; in MSS_UART_irq_tx()452 this_uart->hw_reg->IER |= ((uint8_t)(((uint32_t)irq_mask & in MSS_UART_enable_irq()484 this_uart->hw_reg->IER &= ((uint8_t)(~((uint32_t)irq_mask & in MSS_UART_disable_irq()532 this_uart->hw_reg->IER |= ERBFI_MASK; in MSS_UART_set_rx_handler()739 this_uart->hw_reg->IER |= ELSI_MASK; in MSS_UART_set_rxstatus_handler()766 this_uart->hw_reg->IER |= ETBEI_MASK; in MSS_UART_set_tx_handler()788 this_uart->hw_reg->IER |= EDSSI_MASK; in MSS_UART_set_modemstatus_handler()1412 this_uart->hw_reg->IER = 0u; in global_init()1757 this_uart->hw_reg->IER &= ~ETBEI_MASK; in default_tx_handler()
706 volatile uint8_t IER; member
87 brdiv = base->IER; in uart_baud_divider_get()333 regs->IER = (uint8_t)(brg >> 8); /* MSB */ in prog_baud_rate()557 base->IER = enmask & (MEC_UART_IER_ERDAI_Msk | MEC_UART_IER_ETHREI_Msk in mec_hal_uart_intr_control()575 base->IER = (base->IER & ~msk) | val; in mec_hal_uart_intr_mask()
117 …__O PCC_IER_Type IER; /**< \brief Offset: 0x04 ( /W 32) Interrupt Enable Reg… member
241 __O ICM_IER_Type IER; /**< \brief Offset: 0x10 ( /W 32) Interrupt Enable */ member
1304 …__O GMAC_IER_Type IER; /**< \brief Offset: 0x028 ( /W 32) Interrupt Enable Re… member
23 …__IOM uint8_t IER; /*!< (@ 0x00000001) UART interrupt enable register o… member
280 __IOM uint8_t IER; /*!< (@ 0x0001) UART IER(RW). BRGD_MSB(RW LCR.DLAB=1) */ member
