Home
last modified time | relevance | path

Searched refs:PCLK_TCPWM0_CLOCKS20 (Results 1 – 5 of 5) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe1m_config.h84 PCLK_TCPWM0_CLOCKS20 = 0x0033u, /* tcpwm[0].clocks[20] */ enumerator
Dtviibe2m_config.h94 PCLK_TCPWM0_CLOCKS20 = 0x003Du, /* tcpwm[0].clocks[20] */ enumerator
Dtviibe4m_config.h94 PCLK_TCPWM0_CLOCKS20 = 0x003Du, /* tcpwm[0].clocks[20] */ enumerator
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h97 PCLK_TCPWM0_CLOCKS20 = 0x013Au, /* tcpwm[0].clocks[20] */ enumerator
Dtviic2d6m_config.h55 PCLK_TCPWM0_CLOCKS20 = 0x0016u, /* tcpwm[0].clocks[20] */ enumerator