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Searched refs:PCLK_CANFD1_CLOCK_CAN0 (Results 1 – 6 of 6) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1A/include/
Dtviibe1m_config.h42 PCLK_CANFD1_CLOCK_CAN0 = 0x0009u, /* canfd[1].clock_can[0] */ enumerator
Dtviibe2m_config.h43 PCLK_CANFD1_CLOCK_CAN0 = 0x000Au, /* canfd[1].clock_can[0] */ enumerator
Dtviibe4m_config.h43 PCLK_CANFD1_CLOCK_CAN0 = 0x000Au, /* canfd[1].clock_can[0] */ enumerator
/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dxmc7100_config.h43 PCLK_CANFD1_CLOCK_CAN0 = 0x0104u, /* canfd[1].clock_can[0] */ enumerator
Dtviic2d6m_config.h119 PCLK_CANFD1_CLOCK_CAN0 = 0x0102u, /* canfd[1].clock_can[0] */ enumerator
Dxmc7200_config.h53 PCLK_CANFD1_CLOCK_CAN0 = 0x0105u, /* canfd[1].clock_can[0] */ enumerator