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Searched refs:P3_2_TCPWM0_LINE1 (Results 1 – 11 of 11) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dgpio_cyw20829_40_qfn.h321 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:0 */ enumerator
Dgpio_cyw20829b0_40_qfn.h321 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:0 */ enumerator
Dgpio_cyw20829_52_qfn.h429 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:4 */ enumerator
Dgpio_cyw20829b0_56_qfn.h453 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:0 */ enumerator
Dgpio_cyw20829_56_qfn.h453 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:0 */ enumerator
Dgpio_cyw20829_77_bga.h453 P3_2_TCPWM0_LINE1 = 8, /* Digital Active - tcpwm[0].line[1]:0 */ enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c352 {0u, 1u, P3_2, P3_2_TCPWM0_LINE1},
Dcyhal_cyw20829a0_40_qfn.c346 {0u, 1u, P3_2, P3_2_TCPWM0_LINE1},
Dcyhal_cyw20829_56_qfn.c412 {0u, 1u, P3_2, P3_2_TCPWM0_LINE1},
Dcyhal_cyw20829a0_56_qfn.c406 {0u, 1u, P3_2, P3_2_TCPWM0_LINE1},
Dcyhal_cyw20829_77_bga.c412 {0u, 1u, P3_2, P3_2_TCPWM0_LINE1},