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Searched refs:P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK (Results 1 – 11 of 11) sorted by relevance

/hal_infineon-latest/mtb-pdl-cat1/devices/COMPONENT_CAT1B/include/
Dgpio_cyw20829_40_qfn.h279 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
Dgpio_cyw20829b0_40_qfn.h279 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
Dgpio_cyw20829_52_qfn.h328 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
Dgpio_cyw20829b0_56_qfn.h371 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
Dgpio_cyw20829_56_qfn.h371 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
Dgpio_cyw20829_77_bga.h371 P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK = 29, /* Digital Deep Sleep - cpuss.clk_swj_swclk_tclk */ enumerator
/hal_infineon-latest/mtb-hal-cat1/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c69 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
Dcyhal_cyw20829a0_40_qfn.c67 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
Dcyhal_cyw20829_56_qfn.c74 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
Dcyhal_cyw20829a0_56_qfn.c72 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
Dcyhal_cyw20829_77_bga.c74 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},