Home
last modified time | relevance | path

Searched refs:P2_0 (Results 1 – 25 of 48) sorted by relevance

12

/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_03_49_wlcsp.c130 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
158 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
200 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
265 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
329 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
352 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
429 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
430 {1u, 3u, P2_0, P2_0_TCPWM1_LINE3},
Dcyhal_psoc6_03_68_qfn.c133 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
171 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
225 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
299 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
369 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
399 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
478 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
479 {1u, 3u, P2_0, P2_0_TCPWM1_LINE3},
Dcyhal_psoc6_04_64_tqfp.c168 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
206 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
255 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
326 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
394 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
463 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
464 {1u, 3u, P2_0, P2_0_TCPWM0_LINE259},
577 {1u, 5u, P2_0, P2_0_TCPWM0_TR_ONE_CNT_IN261},
Dcyhal_psoc6_03_100_tqfp.c140 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
180 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
240 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
322 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
400 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
432 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
511 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
512 {1u, 3u, P2_0, P2_0_TCPWM1_LINE3},
Dcyhal_psoc6_04_68_qfn.c166 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
204 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
253 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
322 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
388 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
457 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
458 {1u, 3u, P2_0, P2_0_TCPWM0_LINE259},
569 {1u, 5u, P2_0, P2_0_TCPWM0_TR_ONE_CNT_IN261},
Dcyhal_psoc6_04_80_m_csp.c168 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
206 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
255 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
328 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
398 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
467 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
468 {1u, 3u, P2_0, P2_0_TCPWM0_LINE259},
584 {1u, 5u, P2_0, P2_0_TCPWM0_TR_ONE_CNT_IN261},
Dcyhal_psoc6_04_80_tqfp.c168 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
206 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
255 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
328 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
398 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
467 {0u, 3u, P2_0, P2_0_TCPWM0_LINE3},
468 {1u, 3u, P2_0, P2_0_TCPWM0_LINE259},
584 {1u, 5u, P2_0, P2_0_TCPWM0_TR_ONE_CNT_IN261},
Dcyhal_psoc6_02_68_qfn.c173 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
209 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
270 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
354 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
437 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
471 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
592 {0u, 6u, P2_0, P2_0_TCPWM0_LINE6},
593 {1u, 15u, P2_0, P2_0_TCPWM1_LINE15},
Dcyhal_psoc6_02_100_wlcsp.c193 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
232 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
314 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
426 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
539 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
584 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
717 {0u, 6u, P2_0, P2_0_TCPWM0_LINE6},
718 {1u, 15u, P2_0, P2_0_TCPWM1_LINE15},
Dcyhal_psoc6_01_124_bga.c173 {0u, 0u, P2_0, P2_0_BLESS_MXD_DPSLP_RET_SWITCH_HV},
312 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
355 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
438 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
568 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
693 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
806 {0u, 6u, P2_0, P2_0_TCPWM0_LINE6},
807 {1u, 15u, P2_0, P2_0_TCPWM1_LINE15},
Dcyhal_psoc6_02_124_bga.c198 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
241 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
332 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
462 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
595 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
645 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
782 {0u, 6u, P2_0, P2_0_TCPWM0_LINE6},
783 {1u, 15u, P2_0, P2_0_TCPWM1_LINE15},
Dcyhal_psoc6_02_128_tqfp.c198 {0u, 4u, P2_0, P2_0_PERI_TR_IO_INPUT4},
241 {1u, 0u, P2_0, P2_0_SCB1_I2C_SCL},
333 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
465 {1u, 0u, P2_0, P2_0_SCB1_SPI_MOSI},
601 {1u, 0u, P2_0, P2_0_SCB1_UART_RX},
651 {0u, 0u, P2_0, P2_0_SDHC0_CARD_DAT_3TO00},
788 {0u, 6u, P2_0, P2_0_TCPWM0_LINE6},
789 {1u, 15u, P2_0, P2_0_TCPWM1_LINE15},
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7100_100_teqfp.c101 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
155 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
260 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
359 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
435 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
484 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
532 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
581 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
640 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
773 {0u, 7u, P2_0, P2_0_TCPWM0_LINE7},
[all …]
Dcyhal_xmc7100_144_teqfp.c111 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
171 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
282 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
421 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
526 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
590 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
654 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
718 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
795 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
943 {0u, 7u, P2_0, P2_0_TCPWM0_LINE7},
[all …]
Dcyhal_xmc7200_176_teqfp.c115 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
180 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
332 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
522 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
645 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
715 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
791 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
861 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
952 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
1107 {4u, 7u, P2_0, P2_0_TCPWM1_LINE7},
[all …]
Dcyhal_xmc7100_176_teqfp.c113 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
176 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
297 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
468 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
589 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
659 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
735 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
805 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
896 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
1050 {0u, 7u, P2_0, P2_0_TCPWM0_LINE7},
[all …]
Dcyhal_xmc7100_272_bga.c115 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
180 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
305 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
490 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
619 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
697 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
790 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
868 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
980 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
1163 {0u, 7u, P2_0, P2_0_TCPWM0_LINE7},
[all …]
Dcyhal_xmc7200_272_bga.c118 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
186 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
366 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
593 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
737 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
815 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
908 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
986 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
1098 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
1283 {4u, 7u, P2_0, P2_0_TCPWM1_LINE7},
[all …]
Dcyhal_xmc7200_320_bga.c118 {0u, 0u, P2_0, P2_0_CANFD0_TTCAN_TX0},
186 {0u, 0u, P2_0, P2_0_CPUSS_SWJ_TRSTN},
393 {0u, 0u, P2_0, P2_0_LIN0_LIN_RX0},
621 {0u, 2u, P2_0, P2_0_PERI_TR_IO_INPUT2},
771 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
852 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
946 {7u, 0u, P2_0, P2_0_SCB7_SPI_MISO},
1027 {0u, 0u, P2_0, P2_0_SCB0_SPI_SELECT1},
1140 {7u, 0u, P2_0, P2_0_SCB7_UART_RX},
1328 {4u, 7u, P2_0, P2_0_TCPWM1_LINE7},
[all …]
/hal_infineon-3.6.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h86 #define P2_0 XMC_GPIO_PORT2, 0 macro
185 #define P2_0 XMC_GPIO_PORT2, 0 macro
302 #define P2_0 XMC_GPIO_PORT2, 0 macro
376 #define P2_0 XMC_GPIO_PORT2, 0 macro
500 #define P2_0 XMC_GPIO_PORT2, 0 macro
715 #define P2_0 XMC_GPIO_PORT2, 0 macro
913 #define P2_0 XMC_GPIO_PORT2, 0 macro
1071 #define P2_0 XMC_GPIO_PORT2, 0 macro
1261 #define P2_0 XMC_GPIO_PORT2, 0 macro
1376 #define P2_0 XMC_GPIO_PORT2, 0 macro
[all …]
Dxmc4_gpio_map.h102 #define P2_0 XMC_GPIO_PORT2, 0 macro
258 #define P2_0 XMC_GPIO_PORT2, 0 macro
376 #define P2_0 XMC_GPIO_PORT2, 0 macro
526 #define P2_0 XMC_GPIO_PORT2, 0 macro
639 #define P2_0 XMC_GPIO_PORT2, 0 macro
762 #define P2_0 XMC_GPIO_PORT2, 0 macro
859 #define P2_0 XMC_GPIO_PORT2, 0 macro
1015 #define P2_0 XMC_GPIO_PORT2, 0 macro
1140 #define P2_0 XMC_GPIO_PORT2, 0 macro
1413 #define P2_0 XMC_GPIO_PORT2, 0 macro
[all …]
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h63 P2_0 = CYHAL_GET_GPIO(CYHAL_PORT_2, 0), //!< Port 2 Pin 0 enumerator
Dcyhal_cyw20829a0_40_qfn.h63 P2_0 = CYHAL_GET_GPIO(CYHAL_PORT_2, 0), //!< Port 2 Pin 0 enumerator
Dcyhal_cyw20829_56_qfn.h70 P2_0 = CYHAL_GET_GPIO(CYHAL_PORT_2, 0), //!< Port 2 Pin 0 enumerator
Dcyhal_cyw20829a0_56_qfn.h70 P2_0 = CYHAL_GET_GPIO(CYHAL_PORT_2, 0), //!< Port 2 Pin 0 enumerator

12