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Searched refs:P1_3 (Results 1 – 25 of 32) sorted by relevance

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/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c69 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
168 {0u, 3u, P1_3, P1_3_PERI_TR_IO_INPUT3},
192 {2u, 0u, P1_3, P1_3_SCB2_I2C_SDA},
207 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
250 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
305 {1u, 0u, P1_3, P1_3_SCB1_UART_TX},
350 {0u, 1u, P1_3, P1_3_TCPWM0_LINE1},
351 {1u, 4u, P1_3, P1_3_TCPWM0_LINE260},
Dcyhal_cyw20829a0_40_qfn.c67 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
164 {0u, 3u, P1_3, P1_3_PERI_TR_IO_INPUT3},
187 {2u, 0u, P1_3, P1_3_SCB2_I2C_SDA},
201 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
244 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
299 {1u, 0u, P1_3, P1_3_SCB1_UART_TX},
344 {0u, 1u, P1_3, P1_3_TCPWM0_LINE1},
345 {1u, 4u, P1_3, P1_3_TCPWM0_LINE260},
Dcyhal_cyw20829_56_qfn.c74 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
125 {0u, 16u, P1_3, P1_3_KEYSCAN_KS_COL16},
201 {0u, 3u, P1_3, P1_3_PERI_TR_IO_INPUT3},
227 {2u, 0u, P1_3, P1_3_SCB2_I2C_SDA},
243 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
294 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
357 {1u, 0u, P1_3, P1_3_SCB1_UART_TX},
406 {0u, 1u, P1_3, P1_3_TCPWM0_LINE1},
407 {1u, 4u, P1_3, P1_3_TCPWM0_LINE260},
Dcyhal_cyw20829a0_56_qfn.c72 {0u, 0u, P1_3, P1_3_CPUSS_CLK_SWJ_SWCLK_TCLK},
123 {0u, 16u, P1_3, P1_3_KEYSCAN_KS_COL16},
197 {0u, 3u, P1_3, P1_3_PERI_TR_IO_INPUT3},
222 {2u, 0u, P1_3, P1_3_SCB2_I2C_SDA},
237 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
288 {1u, 0u, P1_3, P1_3_SCB1_SPI_MISO},
351 {1u, 0u, P1_3, P1_3_SCB1_UART_TX},
400 {0u, 1u, P1_3, P1_3_TCPWM0_LINE1},
401 {1u, 4u, P1_3, P1_3_TCPWM0_LINE260},
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_01_104_m_csp_ble.c432 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
536 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
588 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
793 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
794 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
Dcyhal_psoc6_01_116_bga_ble.c435 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
545 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
602 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
818 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
819 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
Dcyhal_psoc6_01_124_bga_sip.c438 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
553 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
614 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
836 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
837 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
Dcyhal_psoc6_01_124_bga.c458 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
588 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
656 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
904 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
905 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
Dcyhal_psoc6_02_124_bga.c352 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
482 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
550 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
880 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
881 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
Dcyhal_psoc6_02_128_tqfp.c353 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
485 {7u, 0u, P1_3, P1_3_SCB7_SPI_SELECT0},
554 {7u, 0u, P1_3, P1_3_SCB7_UART_CTS},
888 {0u, 4u, P1_3, P1_3_TCPWM0_LINE_COMPL4},
889 {1u, 12u, P1_3, P1_3_TCPWM1_LINE_COMPL12},
/hal_infineon-3.6.0/XMCLib/drivers/inc/
Dxmc1_gpio_map.h85 #define P1_3 XMC_GPIO_PORT1, 3 macro
181 #define P1_3 XMC_GPIO_PORT1, 3 macro
373 #define P1_3 XMC_GPIO_PORT1, 3 macro
497 #define P1_3 XMC_GPIO_PORT1, 3 macro
711 #define P1_3 XMC_GPIO_PORT1, 3 macro
912 #define P1_3 XMC_GPIO_PORT1, 3 macro
1068 #define P1_3 XMC_GPIO_PORT1, 3 macro
1260 #define P1_3 XMC_GPIO_PORT1, 3 macro
1372 #define P1_3 XMC_GPIO_PORT1, 3 macro
1597 #define P1_3 XMC_GPIO_PORT1, 3 macro
[all …]
Dxmc4_gpio_map.h95 #define P1_3 XMC_GPIO_PORT1, 3 macro
255 #define P1_3 XMC_GPIO_PORT1, 3 macro
369 #define P1_3 XMC_GPIO_PORT1, 3 macro
523 #define P1_3 XMC_GPIO_PORT1, 3 macro
632 #define P1_3 XMC_GPIO_PORT1, 3 macro
759 #define P1_3 XMC_GPIO_PORT1, 3 macro
852 #define P1_3 XMC_GPIO_PORT1, 3 macro
1012 #define P1_3 XMC_GPIO_PORT1, 3 macro
1127 #define P1_3 XMC_GPIO_PORT1, 3 macro
1400 #define P1_3 XMC_GPIO_PORT1, 3 macro
[all …]
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7200_176_teqfp.c372 {0u, 0u, P1_3, P1_3_LIN0_LIN_TX0},
521 {0u, 1u, P1_3, P1_3_PERI_TR_IO_INPUT1},
692 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
838 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1105 {4u, 8u, P1_3, P1_3_TCPWM1_LINE8},
1106 {6u, 7u, P1_3, P1_3_TCPWM1_LINE519},
1287 {4u, 10u, P1_3, P1_3_TCPWM1_LINE_COMPL10},
1481 {4u, 24u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN24},
1482 {4u, 31u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN31},
Dcyhal_xmc7100_176_teqfp.c336 {0u, 0u, P1_3, P1_3_LIN0_LIN_TX0},
467 {0u, 1u, P1_3, P1_3_PERI_TR_IO_INPUT1},
636 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
782 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1048 {0u, 8u, P1_3, P1_3_TCPWM0_LINE8},
1049 {2u, 7u, P1_3, P1_3_TCPWM0_LINE519},
1212 {0u, 10u, P1_3, P1_3_TCPWM0_LINE_COMPL10},
1387 {0u, 24u, P1_3, P1_3_TCPWM0_TR_ONE_CNT_IN24},
1388 {0u, 31u, P1_3, P1_3_TCPWM0_TR_ONE_CNT_IN31},
Dcyhal_xmc7100_272_bga.c347 {0u, 0u, P1_3, P1_3_LIN0_LIN_TX0},
489 {0u, 1u, P1_3, P1_3_PERI_TR_IO_INPUT1},
670 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
841 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1161 {0u, 8u, P1_3, P1_3_TCPWM0_LINE8},
1162 {2u, 7u, P1_3, P1_3_TCPWM0_LINE519},
1330 {0u, 10u, P1_3, P1_3_TCPWM0_LINE_COMPL10},
1509 {0u, 24u, P1_3, P1_3_TCPWM0_TR_ONE_CNT_IN24},
1510 {0u, 31u, P1_3, P1_3_TCPWM0_TR_ONE_CNT_IN31},
Dcyhal_xmc7200_272_bga.c417 {0u, 0u, P1_3, P1_3_LIN0_LIN_TX0},
592 {0u, 1u, P1_3, P1_3_PERI_TR_IO_INPUT1},
788 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
959 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1280 {4u, 8u, P1_3, P1_3_TCPWM1_LINE8},
1281 {6u, 7u, P1_3, P1_3_TCPWM1_LINE519},
1508 {4u, 10u, P1_3, P1_3_TCPWM1_LINE_COMPL10},
1747 {4u, 24u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN24},
1748 {4u, 31u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN31},
Dcyhal_xmc7200_320_bga.c444 {0u, 0u, P1_3, P1_3_LIN0_LIN_TX0},
620 {0u, 1u, P1_3, P1_3_PERI_TR_IO_INPUT1},
825 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1000 {0u, 0u, P1_3, P1_3_SCB0_SPI_SELECT0},
1325 {4u, 8u, P1_3, P1_3_TCPWM1_LINE8},
1326 {6u, 7u, P1_3, P1_3_TCPWM1_LINE519},
1553 {4u, 10u, P1_3, P1_3_TCPWM1_LINE_COMPL10},
1792 {4u, 24u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN24},
1793 {4u, 31u, P1_3, P1_3_TCPWM1_TR_ONE_CNT_IN31},
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h61 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_cyw20829a0_40_qfn.h61 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_cyw20829_56_qfn.h65 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_cyw20829a0_56_qfn.h65 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_01_104_m_csp_ble.h64 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_psoc6_01_116_bga_ble.h65 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_psoc6_01_124_bga_sip.h65 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator
Dcyhal_psoc6_02_124_bga.h65 P1_3 = CYHAL_GET_GPIO(CYHAL_PORT_1, 3), //!< Port 1 Pin 3 enumerator

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