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Searched refs:P0_2_SCB0_SPI_CLK (Results 1 – 14 of 14) sorted by relevance

/hal_infineon-3.6.0/mtb-hal-cat1/COMPONENT_CAT1C/source/pin_packages/
Dcyhal_xmc7100_100_teqfp.c418 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
515 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7100_144_teqfp.c503 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
631 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7200_176_teqfp.c617 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
763 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7100_176_teqfp.c561 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
707 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7100_272_bga.c587 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
758 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7200_272_bga.c705 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
876 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
Dcyhal_xmc7200_320_bga.c738 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
913 {0u, 0u, P0_2, P0_2_SCB0_SPI_CLK},
/hal_infineon-3.6.0/mtb-pdl-cat1/devices/COMPONENT_CAT1C/include/
Dgpio_xmc7100_100_teqfp.h573 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7100_144_teqfp.h795 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7100_176_teqfp.h951 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7200_176_teqfp.h990 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7100_272_bga.h1273 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7200_320_bga.h1410 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator
Dgpio_xmc7200_272_bga.h1326 P0_2_SCB0_SPI_CLK = 30, /* Digital Deep Sleep - scb[0].spi_clk:0 */ enumerator