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Searched refs:P3_2 (Results 1 – 13 of 13) sorted by relevance

/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/source/pin_packages/
Dcyhal_cyw20829_40_qfn.c36 {0u, 0u, P3_2, P3_2_ADCMIC_CLK_PDM},
45 {0u, 2u, P3_2, HSIOM_SEL_GPIO},
57 {0u, 0u, P3_2, P3_2_CANFD0_TTCAN_RX0},
95 {0u, 0u, P3_2, P3_2_LIN0_LIN_RX0},
105 {0u, 0u, P3_2, P3_2_PDM_PDM_CLK0},
124 {0u, 6u, P3_2, P3_2_PERI_TR_IO_INPUT6},
140 {2u, 0u, P3_2, P3_2_SCB2_I2C_SCL},
168 {1u, 0u, P3_2, P3_2_SCB1_SPI_MOSI},
211 {1u, 0u, P3_2, P3_2_SCB1_SPI_MOSI},
253 {2u, 0u, P3_2, P3_2_SCB2_UART_RX},
[all …]
Dcyhal_cyw20829_56_qfn.c36 {0u, 0u, P3_2, P3_2_ADCMIC_CLK_PDM},
46 {0u, 2u, P3_2, HSIOM_SEL_GPIO},
62 {0u, 0u, P3_2, P3_2_CANFD0_TTCAN_RX0},
85 {0u, 13u, P3_2, P3_2_KEYSCAN_KS_COL13},
121 {0u, 0u, P3_2, P3_2_LIN0_LIN_RX0},
133 {0u, 0u, P3_2, P3_2_PDM_PDM_CLK0},
155 {0u, 6u, P3_2, P3_2_PERI_TR_IO_INPUT6},
172 {2u, 0u, P3_2, P3_2_SCB2_I2C_SCL},
203 {1u, 0u, P3_2, P3_2_SCB1_SPI_MOSI},
254 {1u, 0u, P3_2, P3_2_SCB1_SPI_MOSI},
[all …]
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/source/pin_packages/
Dcyhal_psoc6_01_124_bga.c108 {0u, 0u, P3_2, P3_2_BLESS_MXD_ACT_DBUS_TX_EN},
341 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
471 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
619 {2u, 0u, P3_2, P3_2_SCB2_UART_RTS},
759 {0u, 3u, P3_2, P3_2_TCPWM0_LINE3},
760 {1u, 20u, P3_2, P3_2_TCPWM1_LINE20},
Dcyhal_psoc6_02_124_bga.c235 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
365 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
518 {2u, 0u, P3_2, P3_2_SCB2_UART_RTS},
735 {0u, 3u, P3_2, P3_2_TCPWM0_LINE3},
736 {1u, 20u, P3_2, P3_2_TCPWM1_LINE20},
Dcyhal_psoc6_02_128_tqfp.c235 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
367 {2u, 0u, P3_2, P3_2_SCB2_SPI_CLK},
523 {2u, 0u, P3_2, P3_2_SCB2_UART_RTS},
741 {0u, 3u, P3_2, P3_2_TCPWM0_LINE3},
742 {1u, 20u, P3_2, P3_2_TCPWM1_LINE20},
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1B/include/pin_packages/
Dcyhal_cyw20829_40_qfn.h71 P3_2 = CYHAL_GET_GPIO(CYHAL_PORT_3, 2), //!< Port 3 Pin 2 enumerator
Dcyhal_cyw20829_56_qfn.h79 P3_2 = CYHAL_GET_GPIO(CYHAL_PORT_3, 2), //!< Port 3 Pin 2 enumerator
/hal_infineon-3.4.0/XMCLib/drivers/inc/
Dxmc_usbh.h104 #define XMC_USB_DRIVE_PORT1 P3_2 /**< Default port(PORT3, pin 2) used to e…
Dxmc4_gpio_map.h1155 #define P3_2 XMC_GPIO_PORT3, 2 macro
1428 #define P3_2 XMC_GPIO_PORT3, 2 macro
1867 #define P3_2 XMC_GPIO_PORT3, 2 macro
2287 #define P3_2 XMC_GPIO_PORT3, 2 macro
2769 #define P3_2 XMC_GPIO_PORT3, 2 macro
3089 #define P3_2 XMC_GPIO_PORT3, 2 macro
3571 #define P3_2 XMC_GPIO_PORT3, 2 macro
3870 #define P3_2 XMC_GPIO_PORT3, 2 macro
4166 #define P3_2 XMC_GPIO_PORT3, 2 macro
4617 #define P3_2 XMC_GPIO_PORT3, 2 macro
[all …]
Dxmc1_gpio_map.h3008 #define P3_2 XMC_GPIO_PORT3, 2 macro
3623 #define P3_2 XMC_GPIO_PORT3, 2 macro
4503 #define P3_2 XMC_GPIO_PORT3, 2 macro
5470 #define P3_2 XMC_GPIO_PORT3, 2 macro
5737 #define P3_2 XMC_GPIO_PORT3, 2 macro
6824 #define P3_2 XMC_GPIO_PORT3, 2 macro
/hal_infineon-3.4.0/mtb-hal-cat1/COMPONENT_PSOC6HAL/COMPONENT_CAT1A/include/pin_packages/
Dcyhal_psoc6_02_124_bga.h80 P3_2 = CYHAL_GET_GPIO(CYHAL_PORT_3, 2), //!< Port 3 Pin 2 enumerator
Dcyhal_psoc6_02_128_tqfp.h80 P3_2 = CYHAL_GET_GPIO(CYHAL_PORT_3, 2), //!< Port 3 Pin 2 enumerator
Dcyhal_psoc6_01_124_bga.h80 P3_2 = CYHAL_GET_GPIO(CYHAL_PORT_3, 2), //!< Port 3 Pin 2 enumerator