1 /** 2 * @file xmc_usbh.h 3 * @date 2018-06-21 4 * 5 ********************************************************************************************************************* 6 * XMClib v2.1.24 - XMC Peripheral Driver Library 7 * 8 * Copyright (c) 2015-2019, Infineon Technologies AG 9 * All rights reserved. 10 * 11 * Redistribution and use in source and binary forms, with or without modification,are permitted provided that the 12 * following conditions are met: 13 * 14 * Redistributions of source code must retain the above copyright notice, this list of conditions and the following 15 * disclaimer. 16 * 17 * Redistributions in binary form must reproduce the above copyright notice, this list of conditions and the following 18 * disclaimer in the documentation and/or other materials provided with the distribution. 19 * 20 * Neither the name of the copyright holders nor the names of its contributors may be used to endorse or promote 21 * products derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, 24 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 27 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY,OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 29 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 * To improve the quality of the software, users are encouraged to share modifications, enhancements or bug fixes with 32 * Infineon Technologies AG dave@infineon.com). 33 ********************************************************************************************************************* 34 * 35 * Change History 36 * -------------- 37 * 38 * 2016-06-30: 39 * - Initial Version.<br> 40 * 2016-09-01: 41 * - Removed Keil specific inclusions and macros<br> 42 * 2018-06-21: 43 * - Fixed compilation issues for XMC42 44 * @endcond 45 * 46 */ 47 48 #ifndef XMC_USBH_H 49 #define XMC_USBH_H 50 51 #include "xmc_common.h" 52 53 #if ((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || (UC_SERIES == XMC43) || (UC_SERIES == XMC47) || (UC_SERIES == XMC48) || defined(DOXYGEN)) 54 55 #include "xmc_scu.h" 56 #include "xmc_gpio.h" 57 58 /** 59 * @addtogroup XMClib XMC Peripheral Library 60 * @{ 61 */ 62 63 /** 64 * @addtogroup USBH 65 * @brief Universal Serial Bus Host (USBH) driver for the XMC4000 microcontroller family. 66 * 67 * The USBH is the host mode device driver for the USB0 hardware module on XMC4000 family of microcontrollers. 68 * The USB0 module can be used to establish a USB interface between outside world and XMC4000 family of controllers. 69 * The USB module includes the following features in host mode: 70 * -# Complies with the USB 2.0 Specification. 71 * -# Supports up to 14 bidirectional pipes, including control pipe 0. 72 * -# Supports SOFs in Full-Speed modes. 73 * -# Supports clock gating for power saving. 74 * -# Supports FIFO mode data transaction. 75 * 76 * The below figure shows the overview of USB0 module in XMC4 microntroller. 77 * @image html USB_module_overview.png 78 * @image latex ../images/USB_module_overview.png 79 * 80 * 81 * The USBH device driver supports the following features:\n 82 * -# Initialize/Uninitialize the USB0 module on XMC4000 device. 83 * -# Control VBUS state. 84 * -# Reset USB port. 85 * -# Set the USB device address. 86 * -# Allocate pipe for new endpoint communication. 87 * -# Modify an existing pipe. 88 * -# Transfer data on selected pipe. 89 * -# Abort ongoing data transaction. 90 * -# Handle multi packet data transaction by updating toggle information. 91 * 92 * The USBH device driver expects registration of callback functions ::XMC_USBH_SignalPortEvent_t and ::XMC_USBH_SignalPipeEvent_t to be executed 93 * when there is port event interrupt and pipe event interrupt respectively.\n 94 * The USBH driver is CMSIS API compatible. Please use Driver_USBH0 to access the USBH API.\n 95 * For example, to initialize the USB host controller, use Driver_USBH0.Initialize().\n 96 * 97 * @{ 98 */ 99 100 /********************************************************************************************************************** 101 * MACROS 102 *********************************************************************************************************************/ 103 /*Drive VBUS*/ 104 #define XMC_USB_DRIVE_PORT1 P3_2 /**< Default port(PORT3, pin 2) used to enable VBUS voltage regulator on the board */ 105 #define XMC_USB_DRIVE_PORT2 P0_1 /**< Alternate port that can be used to enable VBUS voltage regulator(PORT0, pin 1) */ 106 107 #ifndef USBH0_MAX_PIPE_NUM 108 #define USBH0_MAX_PIPE_NUM (14U) /**< Representation of number of pipes available */ 109 #endif 110 #if (USBH0_MAX_PIPE_NUM > 14U) 111 #error Too many Pipes, maximum Pipes that this driver supports is 14 !!! 112 #endif 113 114 #define XMC_USBH_CLOCK_GATING_ENABLE 1 /**< Used to enable clock gating when the driver is powered down*/ 115 #define XMC_USBH_CLOCK_GATING_DISABLE 0 /**< Used to disable clock gating when the driver is fully powered*/ 116 117 #define USB_CH_HCCHARx_MPS(x) (((uint32_t) x ) & (uint32_t)USB_CH_HCCHAR_MPS_Msk) /**< Masks maximum packet size information from the HCCHAR register value provided as input */ 118 #define USB_CH_HCCHARx_EPNUM(x) (((uint32_t) x << USB_CH_HCCHAR_EPNum_Pos) & (uint32_t)USB_CH_HCCHAR_EPNum_Msk) /**< Shifts the value to the position of endpoint number(EPNum) in the HCCHAR register*/ 119 #define USB_CH_HCCHARx_EPTYPE(x) (((uint32_t) x << USB_CH_HCCHAR_EPType_Pos) & (uint32_t)USB_CH_HCCHAR_EPType_Msk) /**< Shifts the value to the position of endpoint type(EPType) in the HCCHAR register*/ 120 #define USB_CH_HCCHARx_MCEC(x) (((uint32_t) x << USB_CH_HCCHAR_MC_EC_Pos) & (uint32_t)USB_CH_HCCHAR_MC_EC_Msk) /**< Shifts the value to the position of multi-count(MC_EC) field in the HCCHAR register*/ 121 #define USB_CH_HCCHARx_DEVADDR(x) (((uint32_t) x << USB_CH_HCCHAR_DevAddr_Pos) & (uint32_t)USB_CH_HCCHAR_DevAddr_Msk) /**< Shifts the value to the position of endpoint type(EPType) in the HCCHAR register*/ 122 #define USB_CH_HCCHARx_EPDIR(x) (((uint32_t) x << USB_CH_HCCHAR_EPDir_Pos) & (uint32_t)USB_CH_HCCHAR_EPDir_Msk) /**< Shifts the value to the position of endpoint direction(EPDir) in the HCCHAR register*/ 123 #define USB_CH_HCCHAR_LSDEV_Msk (((uint32_t) 0x1 << 15U) & 0x1U) 124 #define USB_CH_HCTSIZx_DPID(x) (((uint32_t) x << USB_CH_HCTSIZ_BUFFERMODE_Pid_Pos) & (uint32_t)USB_CH_HCTSIZ_BUFFERMODE_Pid_Msk) /**< Shifts the value to the position of packet ID (PID) in the HCTSIZ register*/ 125 #define USB_CH_HCTSIZx_DPID_DATA0 (USB_CH_HCTSIZx_DPID(0U)) /**< Represents DATA toggle DATA0 as in HCTSIZ register*/ 126 #define USB_CH_HCTSIZx_DPID_DATA2 (USB_CH_HCTSIZx_DPID(1U)) /**< Represents DATA toggle DATA2 as in HCTSIZ register*/ 127 #define USB_CH_HCTSIZx_DPID_DATA1 (USB_CH_HCTSIZx_DPID(2U)) /**< Represents DATA toggle DATA1 as in HCTSIZ register*/ 128 #define USB_CH_HCTSIZx_DPID_MDATA (USB_CH_HCTSIZx_DPID(3U)) /**< Represents DATA toggle MDATA as in HCTSIZ register*/ 129 #define USB_CH_HCTSIZx_DPID_SETUP (USB_CH_HCTSIZx_DPID(3U)) /**< Represents SETUP token as in HCTSIZ register*/ 130 #define USB_GRXSTSR_HOSTMODE_PktSts_IN_DATA_PKT 0x2 /**< Represents IN data token as in receive status pop register(GRXSTSP)*/ 131 #define USB_GRXSTSR_HOSTMODE_PktSts_IN_TRSF_CPL 0x3 /**< Represents paket status information as in receive status pop register(GRXSTSP)*/ 132 133 134 #define USB_CH_HCFG_FSLSSUP(x) (((uint32_t) x << USB_HCFG_FSLSSupp_Pos) & USB_HCFG_FSLSSupp_Msk) /**< Provides register value to update USB full speed related mask FLSSupp of register HCFG*/ 135 #define USB_CH_HCFG_FSLSPCS(x) (((uint32_t) x ) & USB_HCFG_FSLSPclkSel_Msk) /**< Provides register value to update PHY clock selection in register HCFG*/ 136 137 #define USB_CH_HCINTx_ALL (USB_CH_HCINTMSK_XferComplMsk_Msk | \ 138 USB_CH_HCINTMSK_ChHltdMsk_Msk | \ 139 USB_CH_HCINTMSK_StallMsk_Msk | \ 140 USB_CH_HCINTMSK_NakMsk_Msk | \ 141 USB_CH_HCINTMSK_AckMsk_Msk | \ 142 USB_CH_HCINTMSK_XactErrMsk_Msk | \ 143 USB_CH_HCINTMSK_BblErrMsk_Msk | \ 144 USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \ 145 USB_CH_HCINTMSK_DataTglErrMsk_Msk) /**< Mask for selecting all channel related events*/ 146 147 #define USB_CH_HCINTx_ERRORS (USB_CH_HCINTMSK_XactErrMsk_Msk | \ 148 USB_CH_HCINTMSK_BblErrMsk_Msk | \ 149 USB_CH_HCINTMSK_FrmOvrunMsk_Msk | \ 150 USB_CH_HCINTMSK_DataTglErrMsk_Msk) /**< Mask for selecting all channel error related events*/ 151 /*Macro to find pipe index using handle*/ 152 #define USBH_PIPE_GET_INDEX(handle) (((uint32_t)handle - (uint32_t)USB0_CH0_BASE)/(0x20U)) /**< Macro provides index of the USB channel based on its base address*/ 153 154 #define XMC_USBH_API_VERSION ((uint16_t)((uint16_t)XMC_LIB_MAJOR_VERSION << 8U) |XMC_LIB_MINOR_VERSION) /**< USBH low level driver API version */ 155 156 /* General return codes */ 157 #define XMC_USBH_DRIVER_OK 0 /**< Operation succeeded */ 158 #define XMC_USBH_DRIVER_ERROR -1 /**< Unspecified error */ 159 #define XMC_USBH_DRIVER_ERROR_BUSY -2 /**< Driver is busy*/ 160 #define XMC_USBH_DRIVER_ERROR_TIMEOUT -3 /**< Timeout occurred */ 161 #define XMC_USBH_DRIVER_ERROR_UNSUPPORTED -4 /**< Operation not supported*/ 162 #define XMC_USBH_DRIVER_ERROR_PARAMETER -5 /**< Parameter error*/ 163 #define XMC_USBH_DRIVER_ERROR_SPECIFIC -6 /**< Start of driver specific errors*/ 164 165 /* USB Speed */ 166 #define XMC_USBH_SPEED_LOW 0U /**< Low-speed USB*/ 167 #define XMC_USBH_SPEED_FULL 1U /**< Full-speed USB*/ 168 #define XMC_USBH_SPEED_HIGH 2U /**< High-speed USB*/ 169 170 /* USB Endpoint Type */ 171 #define XMC_USBH_ENDPOINT_CONTROL 0 /**< Control Endpoint*/ 172 #define XMC_USBH_ENDPOINT_ISOCHRONOUS 1 /**< Isochronous Endpoint*/ 173 #define XMC_USBH_ENDPOINT_BULK 2 /**< Bulk Endpoint*/ 174 #define XMC_USBH_ENDPOINT_INTERRUPT 3 /**< Interrupt Endpoint*/ 175 176 #define XMC_USBH_SignalEndpointEvent_t XMC_USBH_SignalPipeEvent_t /**< Legacy name for the pipe event handler*/ 177 178 /****** USB Host Packet Information *****/ 179 #define XMC_USBH_PACKET_TOKEN_Pos 0 /**< Packet token position*/ 180 #define XMC_USBH_PACKET_TOKEN_Msk (0x0FUL << XMC_USBH_PACKET_TOKEN_Pos) /**< Packet token mask*/ 181 #define XMC_USBH_PACKET_SETUP (0x01UL << XMC_USBH_PACKET_TOKEN_Pos) /**< SETUP Packet*/ 182 #define XMC_USBH_PACKET_OUT (0x02UL << XMC_USBH_PACKET_TOKEN_Pos) /**< OUT Packet*/ 183 #define XMC_USBH_PACKET_IN (0x03UL << XMC_USBH_PACKET_TOKEN_Pos) /**< IN Packet*/ 184 #define XMC_USBH_PACKET_PING (0x04UL << XMC_USBH_PACKET_TOKEN_Pos) /**< PING Packet*/ 185 186 #define XMC_USBH_PACKET_DATA_Pos 4 /**< Packet data PID position*/ 187 #define XMC_USBH_PACKET_DATA_Msk (0x0FUL << XMC_USBH_PACKET_DATA_Pos) /**< Packet data PID mask*/ 188 #define XMC_USBH_PACKET_DATA0 (0x01UL << XMC_USBH_PACKET_DATA_Pos) /**< DATA0 PID */ 189 #define XMC_USBH_PACKET_DATA1 (0x02UL << XMC_USBH_PACKET_DATA_Pos) /**< DATA1 PID */ 190 191 #define XMC_USBH_PACKET_SPLIT_Pos 8 192 #define XMC_USBH_PACKET_SPLIT_Msk (0x0FUL << XMC_USBH_PACKET_SPLIT_Pos) 193 #define XMC_USBH_PACKET_SSPLIT (0x08UL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet */ 194 #define XMC_USBH_PACKET_SSPLIT_S (0x09UL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data Start */ 195 #define XMC_USBH_PACKET_SSPLIT_E (0x0AUL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data End */ 196 #define XMC_USBH_PACKET_SSPLIT_S_E (0x0BUL << XMC_USBH_PACKET_SPLIT_Pos) /**< SSPLIT Packet: Data All */ 197 #define XMC_USBH_PACKET_CSPLIT (0x0CUL << XMC_USBH_PACKET_SPLIT_Pos) /**< CSPLIT Packet */ 198 199 #define XMC_USBH_PACKET_PRE (1UL << 12) /**< PRE Token */ 200 201 202 /****** USB Host Port Event *****/ 203 #define XMC_USBH_EVENT_CONNECT (1UL << 0) /**< USB Device Connected to Port */ 204 #define XMC_USBH_EVENT_DISCONNECT (1UL << 1) /**< USB Device Disconnected from Port */ 205 #define XMC_USBH_EVENT_OVERCURRENT (1UL << 2) /**< USB Device caused Overcurrent */ 206 #define XMC_USBH_EVENT_RESET (1UL << 3) /**< USB Reset completed */ 207 #define XMC_USBH_EVENT_SUSPEND (1UL << 4) /**< USB Suspend occurred */ 208 #define XMC_USBH_EVENT_RESUME (1UL << 5) /**< USB Resume occurred */ 209 #define XMC_USBH_EVENT_REMOTE_WAKEUP (1UL << 6) /**< USB Device activated Remote Wakeup */ 210 211 /****** USB Host Pipe Event *****/ 212 #define XMC_USBH_EVENT_TRANSFER_COMPLETE (1UL << 0) /**< Transfer completed */ 213 #define XMC_USBH_EVENT_HANDSHAKE_NAK (1UL << 1) /**< NAK Handshake received */ 214 #define XMC_USBH_EVENT_HANDSHAKE_NYET (1UL << 2) /**< NYET Handshake received */ 215 #define XMC_USBH_EVENT_HANDSHAKE_MDATA (1UL << 3) /**< MDATA Handshake received */ 216 #define XMC_USBH_EVENT_HANDSHAKE_STALL (1UL << 4) /**< STALL Handshake received */ 217 #define XMC_USBH_EVENT_HANDSHAKE_ERR (1UL << 5) /**< ERR Handshake received */ 218 #define XMC_USBH_EVENT_BUS_ERROR (1UL << 6) /**< Bus Error detected */ 219 /******************************************************************************* 220 * ENUMS 221 *******************************************************************************/ 222 /** 223 * @brief General power states of USB peripheral driver 224 */ 225 typedef enum XMC_USBH_POWER_STATE { 226 XMC_USBH_POWER_OFF, /**< Power off: no operation possible */ 227 XMC_USBH_POWER_LOW, /**< Low Power mode: retain state, detect and signal wake-up events */ 228 XMC_USBH_POWER_FULL /**< Power on: full operation at maximum performance */ 229 } XMC_USBH_POWER_STATE_t; 230 /******************************************************************************* 231 * DATA STRUCTURES 232 *******************************************************************************/ 233 /** 234 * @brief USB host Driver Version 235 */ 236 typedef struct XMC_USBH_DRIVER_VERSION { 237 uint16_t api; /**< API version */ 238 uint16_t drv; /**< Driver version */ 239 } XMC_USBH_DRIVER_VERSION_t; 240 241 242 /** 243 * @brief USB Host Port State 244 */ 245 typedef struct XMC_USBH_PORT_STATE { 246 uint32_t connected : 1; /**< USB Host Port connected flag */ 247 uint32_t overcurrent : 1; /**< USB Host Port overcurrent flag */ 248 uint32_t speed : 2; /**< USB Host Port speed setting (ARM_USB_SPEED_xxx) */ 249 } XMC_USBH_PORT_STATE_t; 250 251 /** 252 * @brief USB Host Pipe Handle. It represents the physical address of a USB channel 253 */ 254 typedef uint32_t XMC_USBH_PIPE_HANDLE; 255 #define XMC_USBH_EP_HANDLE XMC_USBH_PIPE_HANDLE /**< Legacy name for pipe handle used by CMSIS*/ 256 257 /** 258 * @brief USB Host Driver Capabilities. 259 */ 260 typedef struct XMC_USBH_CAPABILITIES { 261 uint32_t port_mask : 15; /**< Root HUB available Ports Mask */ 262 uint32_t auto_split : 1; /**< Automatic SPLIT packet handling */ 263 uint32_t event_connect : 1; /**< Signal Connect event */ 264 uint32_t event_disconnect : 1; /**< Signal Disconnect event */ 265 uint32_t event_overcurrent : 1; /**< Signal Overcurrent event */ 266 } XMC_USBH_CAPABILITIES_t; 267 268 269 typedef void (*XMC_USBH_SignalPortEvent_t) (uint8_t port, uint32_t event); /**< Pointer to \ref ARM_USBH_SignalPortEvent : Signal Root HUB Port Event. */ 270 typedef void (*XMC_USBH_SignalPipeEvent_t) (XMC_USBH_PIPE_HANDLE pipe_hndl, uint32_t event); /**< Pointer to \ref ARM_USBH_SignalPipeEvent : Signal Pipe Event. */ 271 272 /** 273 * @brief Access structure of USB Host Driver. 274 */ 275 typedef struct XMC_USBH_DRIVER { 276 XMC_USBH_DRIVER_VERSION_t (*GetVersion) (void); /**< Pointer to \ref ARM_USBH_GetVersion : Get driver version. */ 277 XMC_USBH_CAPABILITIES_t (*GetCapabilities) (void); /**< Pointer to \ref ARM_USBH_GetCapabilities : Get driver capabilities. */ 278 int32_t (*Initialize) (XMC_USBH_SignalPortEvent_t cb_port_event, 279 XMC_USBH_SignalPipeEvent_t cb_pipe_event); /**< Pointer to \ref ARM_USBH_Initialize : Initialize USB Host Interface. */ 280 int32_t (*Uninitialize) (void); /**< Pointer to \ref ARM_USBH_Uninitialize : De-initialize USB Host Interface. */ 281 int32_t (*PowerControl) (XMC_USBH_POWER_STATE_t state); /**< Pointer to \ref ARM_USBH_PowerControl : Control USB Host Interface Power. */ 282 int32_t (*PortVbusOnOff) (uint8_t port, bool vbus); /**< Pointer to \ref ARM_USBH_PortVbusOnOff : Root HUB Port VBUS on/off. */ 283 int32_t (*PortReset) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortReset : Do Root HUB Port Reset. */ 284 int32_t (*PortSuspend) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortSuspend : Suspend Root HUB Port (stop generating SOFs). */ 285 int32_t (*PortResume) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortResume : Resume Root HUB Port (start generating SOFs). */ 286 XMC_USBH_PORT_STATE_t (*PortGetState) (uint8_t port); /**< Pointer to \ref ARM_USBH_PortGetState : Get current Root HUB Port State. */ 287 XMC_USBH_PIPE_HANDLE (*PipeCreate) (uint8_t dev_addr, 288 uint8_t dev_speed, 289 uint8_t hub_addr, 290 uint8_t hub_port, 291 uint8_t ep_addr, 292 uint8_t ep_type, 293 uint16_t ep_max_packet_size, 294 uint8_t ep_interval); /**< Pointer to \ref ARM_USBH_PipeCreate : Create Pipe in System. */ 295 int32_t (*PipeModify) (XMC_USBH_PIPE_HANDLE pipe_hndl, 296 uint8_t dev_addr, 297 uint8_t dev_speed, 298 uint8_t hub_addr, 299 uint8_t hub_port, 300 uint16_t ep_max_packet_size); /**< Pointer to \ref ARM_USBH_PipeModify : Modify Pipe in System. */ 301 int32_t (*PipeDelete) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeDelete : Delete Pipe from System. */ 302 int32_t (*PipeReset) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeReset : Reset Pipe. */ 303 int32_t (*PipeTransfer) (XMC_USBH_PIPE_HANDLE pipe_hndl, 304 uint32_t packet, 305 uint8_t *data, 306 uint32_t num); /**< Pointer to \ref ARM_USBH_PipeTransfer : Transfer packets through USB Pipe. */ 307 uint32_t (*PipeTransferGetResult) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeTransferGetResult : Get result of USB Pipe transfer. */ 308 int32_t (*PipeTransferAbort) (XMC_USBH_PIPE_HANDLE pipe_hndl); /**< Pointer to \ref ARM_USBH_PipeTransferAbort : Abort current USB Pipe transfer. */ 309 uint16_t (*GetFrameNumber) (void); /**< Pointer to \ref ARM_USBH_GetFrameNumber : Get current USB Frame Number. */ 310 } const XMC_USBH_DRIVER_t; 311 312 313 /** 314 * @brief Structure to handle various states of USB host driver. An instance exists for each USB channel 315 */ 316 typedef struct XMC_USBH0_pipe { 317 uint32_t packet; /**< Holds packet token and PID information of ongoing data packet transaction*/ 318 uint8_t *data; /**< Holds address of data buffer. It represents source buffer for OUT or SETUP transfer and 319 destination address for IN transfer*/ 320 uint32_t num; /**< Number of bytes of data to be transmitted*/ 321 uint32_t num_transferred_total; /**< Number of bytes transmitted or received at the moment*/ 322 uint32_t num_transferring; /**< Number of bytes being transmitted currently*/ 323 uint16_t ep_max_packet_size; /**< Maximum packet size for the selected pipe*/ 324 uint16_t interval_reload; /**< For INTERRUPT or ISOCHRONOUS pipe, it represents the period for repeated transfer*/ 325 uint16_t interval; /**< For INTERRUPT or ISOCHRONOUS pipe, it represents the decrementing count to reach 0 for initiating retransmission*/ 326 uint8_t ep_type; /**< Endpoint type for selected pipe*/ 327 uint8_t in_use; /**< Set to true when transfer is in progress and reset only after the /ref num of bytes is transferred*/ 328 uint8_t transfer_active; /**< Set to true when a transfer has been initiated and reset when event for transfer complete occurs*/ 329 uint8_t interrupt_triggered; /**< For INTERRUPT or ISOCHRONOUS pipe, indicates if retransmit timeout has occurred*/ 330 uint8_t event; /**< Holds pipe specific event flags*/ 331 } XMC_USBH0_pipe_t; 332 333 334 typedef struct xmc_usb_host_device { 335 USB0_GLOBAL_TypeDef *global_register; /**< Global register interface */ 336 USB0_CH_TypeDef *host_channel_registers; /**< Host channel interface */ 337 XMC_USBH_SignalPortEvent_t SignalPortEvent_cb; /**< Port event callback; set during init */ 338 XMC_USBH_SignalPipeEvent_t SignalPipeEvent_cb; /**< Pipe event callback; set during init */ 339 bool init_done; /**< init status */ 340 XMC_USBH_POWER_STATE_t power_state; /**< USB Power status */ 341 bool port_reset_active; /**< Port reset state */ 342 } XMC_USBH0_DEVICE_t; 343 344 /******************************************************************************* 345 * API PROTOTYPES 346 *******************************************************************************/ 347 #ifdef __cplusplus 348 extern "C" { 349 #endif 350 351 /** 352 * @param gintsts USB global interrupt status. 353 * @return None. 354 * 355 * \par<b>Description:</b><br> 356 * Updates logical state of the USB host driver based on the input status value. It handles port interrupt 357 * and channel interrupt. It responsible for updating data toggle information for multi-packet data transmission. 358 * It executes the callback function on transfer completion and reception of data. It also does error management and 359 * calls the relevant callback functions to indicate it to the application. 360 */ 361 void XMC_USBH_HandleIrq (uint32_t gintsts); 362 /** 363 * @param ms Delay in milliseconds. 364 * @return uint8_t Value has no significance for the low level driver. 365 * 366 * \par<b>Description:</b><br> 367 * Function implements time delay logic. The USB host low level driver provides a weak definition 368 * for delay which has to re-implemented with time delay logic. The low level driver expects blocking 369 * implementation of the delay. 370 */ 371 uint8_t XMC_USBH_osDelay(uint32_t ms); 372 373 /** 374 * @param port Address of the port which has the pin used to enable VBUS charge pump. 375 * @param pin Pin number in the port selected in previous argument using which the VBUS charge pump has to be enabled. 376 * @return None 377 * 378 * \par<b>Description:</b><br> 379 * Configures the port pin with alternate output function 1. VBUS enabling pins work with alternate output function 1. \n 380 * <i>Note:</i>The input port pin should support USB VBUS as an alternate function. \n 381 * Typical ports that support VBUS enable are: P3_2 and P0_1. 382 * 383 */ 384 void XMC_USBH_Select_VBUS(XMC_GPIO_PORT_t* port, uint32_t pin); 385 386 /** 387 * @return USB host mode interrupt status. Bit field USB0_BASE->GINTSTS_HOSTMODE 388 * 389 * \par<b>Description:</b><br> 390 * Provides USB host global interrupt status. \n 391 * This value can be used to provide interrupt status to the IRQ handler function XMC_USBH_HandleIrq(). 392 * 393 */ 394 uint32_t XMC_USBH_GetInterruptStatus(void); 395 396 /** 397 * @return None 398 * 399 * \par<b>Description:</b><br> 400 * De-asserts resume bit. \n 401 * The function shall be called 20ms after detecting port remote wakeup event. \n 402 * 403 */ 404 void XMC_USBH_TurnOffResumeBit(void); 405 #ifdef __cplusplus 406 } 407 #endif 408 /** 409 * @} 410 */ 411 412 /** 413 * @} 414 */ 415 #endif /* ((UC_SERIES == XMC45) || (UC_SERIES == XMC44) || (UC_SERIES == XMC43) || (UC_SERIES == XMC47) || (UC_SERIES == XMC48) || DOXYGEN) */ 416 #endif /* XMC_USBH_H */ 417 418 419
