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/hal_gigadevice-latest/gd32vf103/riscv/drivers/
Dn200_func.c163 void eclic_enable_interrupt (uint32_t source) { in eclic_enable_interrupt() argument
164 *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IE_OFFSET+source*4) = 1; in eclic_enable_interrupt()
167 void eclic_disable_interrupt (uint32_t source){ in eclic_disable_interrupt() argument
168 *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IE_OFFSET+source*4) = 0; in eclic_disable_interrupt()
171 void eclic_set_pending(uint32_t source){ in eclic_set_pending() argument
172 *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IP_OFFSET+source*4) = 1; in eclic_set_pending()
175 void eclic_clear_pending(uint32_t source){ in eclic_clear_pending() argument
176 *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_IP_OFFSET+source*4) = 0; in eclic_clear_pending()
179 void eclic_set_intctrl (uint32_t source, uint8_t intctrl){ in eclic_set_intctrl() argument
180 *(volatile uint8_t*)(ECLIC_ADDR_BASE+ECLIC_INT_CTRL_OFFSET+source*4) = intctrl; in eclic_set_intctrl()
[all …]
Dn200_func.h40 void eclic_enable_interrupt (uint32_t source);
41 void eclic_disable_interrupt (uint32_t source);
43 void eclic_set_pending(uint32_t source);
44 void eclic_clear_pending(uint32_t source);
46 void eclic_set_intctrl (uint32_t source, uint8_t intctrl);
47 uint8_t eclic_get_intctrl (uint32_t source);
49 void eclic_set_intattr (uint32_t source, uint8_t intattr);
50 uint8_t eclic_get_intattr (uint32_t source);
65 void eclic_set_irq_lvl(uint32_t source, uint8_t lvl);
66 uint8_t eclic_get_irq_lvl(uint32_t source);
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_eclic.c90 void eclic_irq_enable(uint32_t source, uint8_t level, uint8_t priority) in eclic_irq_enable() argument
92 eclic_enable_interrupt(source); in eclic_irq_enable()
93 eclic_set_irq_lvl_abs(source, level); in eclic_irq_enable()
94 eclic_set_irq_priority(source, priority); in eclic_irq_enable()
103 void eclic_irq_disable(uint32_t source) in eclic_irq_disable() argument
105 eclic_disable_interrupt(source); in eclic_irq_disable()
Dgd32vf103_gpio.c400 uint32_t source = 0U; in gpio_exti_source_select() local
401 source = ((uint32_t) 0x0FU) in gpio_exti_source_select()
407 AFIO_EXTISS0 &= ~source; in gpio_exti_source_select()
413 AFIO_EXTISS1 &= ~source; in gpio_exti_source_select()
419 AFIO_EXTISS2 &= ~source; in gpio_exti_source_select()
425 AFIO_EXTISS3 &= ~source; in gpio_exti_source_select()
Dgd32vf103_dma.c678 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
684 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
702 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
708 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_gpio.c426 uint32_t source = 0U; in gpio_exti_source_select() local
427 source = ((uint32_t)0x0FU) << (AFIO_EXTI_SOURCE_FIELDS * (output_pin & AFIO_EXTI_SOURCE_MASK)); in gpio_exti_source_select()
432 AFIO_EXTISS0 &= ~source; in gpio_exti_source_select()
436 AFIO_EXTISS1 &= ~source; in gpio_exti_source_select()
440 AFIO_EXTISS2 &= ~source; in gpio_exti_source_select()
444 AFIO_EXTISS3 &= ~source; in gpio_exti_source_select()
Dgd32f403_dma.c681 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
687 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
705 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
711 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_gpio.c413 uint32_t source = 0U; in gpio_exti_source_select() local
414 source = ((uint32_t)0x0FU) << (AFIO_EXTI_SOURCE_FIELDS * (output_pin & AFIO_EXTI_SOURCE_MASK)); in gpio_exti_source_select()
419 AFIO_EXTISS0 &= ~source; in gpio_exti_source_select()
423 AFIO_EXTISS1 &= ~source; in gpio_exti_source_select()
427 AFIO_EXTISS2 &= ~source; in gpio_exti_source_select()
431 AFIO_EXTISS3 &= ~source; in gpio_exti_source_select()
Dgd32e10x_dma.c685 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
691 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
709 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
715 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_eclic.h58 void eclic_irq_enable(uint32_t source, uint8_t level, uint8_t priority);
60 void eclic_irq_disable(uint32_t source);
Dgd32vf103_dma.h280 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source);
282 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source);
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_gpio.c575 uint32_t source = 0U; in gpio_exti_source_select() local
576 source = ((uint32_t)0x0FU) << (AFIO_EXTI_SOURCE_FIELDS * (output_pin & AFIO_EXTI_SOURCE_MASK)); in gpio_exti_source_select()
581 AFIO_EXTISS0 &= ~source; in gpio_exti_source_select()
585 AFIO_EXTISS1 &= ~source; in gpio_exti_source_select()
589 AFIO_EXTISS2 &= ~source; in gpio_exti_source_select()
593 AFIO_EXTISS3 &= ~source; in gpio_exti_source_select()
Dgd32e50x_shrtimer.c1475 exevcfg->source = SHRTIMER_EXEV_SRC0; in shrtimer_exeventcfg_struct_para_init()
1575 faultcfg->source = SHRTIMER_FAULT_SOURCE_PIN; in shrtimer_faultcfg_struct_para_init()
1606 fltincfg0 |= faultcfg->source; in shrtimer_fault_config()
1617 fltincfg0 |= ((faultcfg->source) << 8); in shrtimer_fault_config()
1628 fltincfg0 |= ((faultcfg->source) << 16); in shrtimer_fault_config()
1639 fltincfg0 |= ((faultcfg->source) << 24); in shrtimer_fault_config()
1650 fltincfg1 |= faultcfg->source; in shrtimer_fault_config()
2989 exevcfg0_reg |= eventcfg->source; in external_event_config()
2999 exevcfg0_reg |= ((eventcfg->source) << 6); in external_event_config()
3009 exevcfg0_reg |= ((eventcfg->source) << 12); in external_event_config()
[all …]
Dgd32e50x_dma.c627 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
633 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
651 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
657 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_dma.c766 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
768 if(DMA_CHXFCTL_FEEIE != source) { in dma_interrupt_enable()
769 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
771 DMA_CHFCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
791 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
793 if(DMA_CHXFCTL_FEEIE != source) { in dma_interrupt_disable()
794 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
796 DMA_CHFCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
Dgd32f4xx_rtc.c702 void rtc_tamper_disable(uint32_t source) in rtc_tamper_disable() argument
705 RTC_TAMP &= (uint32_t)~source; in rtc_tamper_disable()
839 void rtc_alarm_output_config(uint32_t source, uint32_t mode) in rtc_alarm_output_config() argument
848 RTC_CTL |= (uint32_t)(source); in rtc_alarm_output_config()
866 void rtc_calibration_output_config(uint32_t source) in rtc_calibration_output_config() argument
874 RTC_CTL |= (uint32_t)(source); in rtc_calibration_output_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_tsi.c490 void tsi_interrupt_enable(uint32_t source) in tsi_interrupt_enable() argument
492 TSI_INTEN |= source; in tsi_interrupt_enable()
504 void tsi_interrupt_disable(uint32_t source) in tsi_interrupt_disable() argument
506 TSI_INTEN &= ~source; in tsi_interrupt_disable()
Dgd32f3x0_dma.c541 void dma_interrupt_enable(dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
543 DMA_CHCTL(channelx) |= source; in dma_interrupt_enable()
559 void dma_interrupt_disable(dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
561 DMA_CHCTL(channelx) &= ~source; in dma_interrupt_disable()
Dgd32f3x0_rtc.c632 void rtc_tamper_disable(uint32_t source) in rtc_tamper_disable() argument
635 RTC_TAMP &= (uint32_t)~source; in rtc_tamper_disable()
751 void rtc_alter_output_config(uint32_t source, uint32_t mode) in rtc_alter_output_config() argument
759 RTC_CTL |= (uint32_t)(source); in rtc_alter_output_config()
762 if(RESET != (source & RTC_OS_ENABLE)){ in rtc_alter_output_config()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_rtc.c735 void rtc_tamper_disable(uint32_t source) in rtc_tamper_disable() argument
738 RTC_TAMP &= (uint32_t)~source; in rtc_tamper_disable()
753 void rtc_tamper_mask(uint32_t source) in rtc_tamper_mask() argument
756 RTC_TAMP |= source; in rtc_tamper_mask()
919 void rtc_alarm_output_config(uint32_t source, uint32_t mode) in rtc_alarm_output_config() argument
928 RTC_CTL |= (uint32_t)(source); in rtc_alarm_output_config()
945 void rtc_calibration_output_config(uint32_t source) in rtc_calibration_output_config() argument
953 RTC_CTL |= (uint32_t)(source); in rtc_calibration_output_config()
Dgd32l23x_dma.c566 void dma_interrupt_enable(dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
568 DMA_CHCTL(channelx) |= source; in dma_interrupt_enable()
584 void dma_interrupt_disable(dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
586 DMA_CHCTL(channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/
DREADME.md27    │ └── source
44    │   ├── source
48    └── source
117 two step work. First move I2CCLK_MAX and I2CCLK_MIN marco from i2c source
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_dma.c543 void dma_interrupt_enable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_enable() argument
545 DMA_CHCTL(dma_periph, channelx) |= source; in dma_interrupt_enable()
562 void dma_interrupt_disable(uint32_t dma_periph, dma_channel_enum channelx, uint32_t source) in dma_interrupt_disable() argument
564 DMA_CHCTL(dma_periph, channelx) &= ~source; in dma_interrupt_disable()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_dma.h270 void dma_interrupt_enable(dma_channel_enum channelx, uint32_t source);
272 void dma_interrupt_disable(dma_channel_enum channelx, uint32_t source);
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_rtc.h605 void rtc_tamper_disable(uint32_t source);
607 void rtc_tamper_mask(uint32_t source);
615 void rtc_alarm_output_config(uint32_t source, uint32_t mode);
617 void rtc_calibration_output_config(uint32_t source);

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