1 /*!
2 \file gd32vf103_eclic.c
3 \brief ECLIC(Enhancement Core-Local Interrupt Controller) driver
4
5 \version 2019-06-05, V1.0.0, firmware for GD32VF103
6 \version 2020-08-04, V1.1.0, firmware for GD32VF103
7 */
8
9 /*
10 Copyright (c) 2020, GigaDevice Semiconductor Inc.
11
12 Redistribution and use in source and binary forms, with or without modification,
13 are permitted provided that the following conditions are met:
14
15 1. Redistributions of source code must retain the above copyright notice, this
16 list of conditions and the following disclaimer.
17 2. Redistributions in binary form must reproduce the above copyright notice,
18 this list of conditions and the following disclaimer in the documentation
19 and/or other materials provided with the distribution.
20 3. Neither the name of the copyright holder nor the names of its contributors
21 may be used to endorse or promote products derived from this software without
22 specific prior written permission.
23
24 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
25 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
26 WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27 IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
28 INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
30 PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
31 WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
33 OF SUCH DAMAGE.
34 */
35
36 #include "gd32vf103_eclic.h"
37 #include "riscv_encoding.h"
38
39 #define REG_DBGMCU2 ((uint32_t)0xE0042008U)
40 #define REG_DBGMCU2EN ((uint32_t)0xE004200CU)
41
42 /*!
43 \brief enable the global interrupt
44 \param[in] none
45 \param[out] none
46 \retval none
47 */
eclic_global_interrupt_enable(void)48 void eclic_global_interrupt_enable(void)
49 {
50 /* set machine interrupt enable bit */
51 set_csr(mstatus, MSTATUS_MIE);
52 }
53
54 /*!
55 \brief disable the global interrupt
56 \param[in] none
57 \param[out] none
58 \retval none
59 */
eclic_global_interrupt_disable(void)60 void eclic_global_interrupt_disable(void)
61 {
62 /* clear machine interrupt enable bit */
63 clear_csr(mstatus, MSTATUS_MIE);
64 }
65
66 /*!
67 \brief set the priority group
68 \param[in] prigroup: specify the priority group
69 \arg ECLIC_PRIGROUP_LEVEL0_PRIO4
70 \arg ECLIC_PRIGROUP_LEVEL1_PRIO3
71 \arg ECLIC_PRIGROUP_LEVEL2_PRIO2
72 \arg ECLIC_PRIGROUP_LEVEL3_PRIO1
73 \arg ECLIC_PRIGROUP_LEVEL4_PRIO0
74 \param[out] none
75 \retval none
76 */
eclic_priority_group_set(uint8_t prigroup)77 void eclic_priority_group_set(uint8_t prigroup)
78 {
79 eclic_set_nlbits(prigroup);
80 }
81
82 /*!
83 \brief enable the interrupt request
84 \param[in] source: interrupt request, detailed in IRQn_Type
85 \param[in] level: the level needed to set (maximum is 15, refer to the priority group)
86 \param[in] priority: the priority needed to set (maximum is 15, refer to the priority group)
87 \param[out] none
88 \retval none
89 */
eclic_irq_enable(uint32_t source,uint8_t level,uint8_t priority)90 void eclic_irq_enable(uint32_t source, uint8_t level, uint8_t priority)
91 {
92 eclic_enable_interrupt(source);
93 eclic_set_irq_lvl_abs(source, level);
94 eclic_set_irq_priority(source, priority);
95 }
96
97 /*!
98 \brief disable the interrupt request
99 \param[in] source: interrupt request, detailed in IRQn_Type
100 \param[out] none
101 \retval none
102 */
eclic_irq_disable(uint32_t source)103 void eclic_irq_disable(uint32_t source)
104 {
105 eclic_disable_interrupt(source);
106 }
107
108 /*!
109 \brief reset system
110 \param[in] none
111 \param[out] none
112 \retval none
113 */
eclic_system_reset(void)114 void eclic_system_reset(void)
115 {
116 REG32(REG_DBGMCU2EN) = (uint32_t)0x4b5a6978U;
117 REG32(REG_DBGMCU2) = (uint32_t)0x1U;
118 }
119
120 /*!
121 \brief send event(SEV)
122 \param[in] none
123 \param[out] none
124 \retval none
125 */
eclic_send_event(void)126 void eclic_send_event(void)
127 {
128 set_csr(0x812U, 0x1U);
129 }
130
