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Searched refs:ocidlestate (Results 1 – 14 of 14) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c824 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
874 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
905 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
916 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
944 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
967 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c688 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
738 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
769 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
800 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
823 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c820 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
870 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
901 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
932 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
955 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c660 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
709 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
740 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
771 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
794 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c693 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
743 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
774 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
805 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
828 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c693 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
742 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
773 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
804 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
827 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c688 ocpara->ocidlestate = TIMER_OC_IDLE_STATE_LOW; in timer_channel_output_struct_para_init()
740 TIMER_CTL1(timer_periph) |= (uint32_t)ocpara->ocidlestate; in timer_channel_output_config()
773 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 2U); in timer_channel_output_config()
805 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 4U); in timer_channel_output_config()
837 TIMER_CTL1(timer_periph) |= (uint32_t)((uint32_t)(ocpara->ocidlestate) << 6U); in timer_channel_output_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h297 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h271 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h291 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h286 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h292 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h285 uint16_t ocidlestate; /*!< idle state of channel output */ member
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h464 …uint16_t ocidlestate; /*!< idle state of… member