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Searched refs:TIMER_CTL1_CCSE (Results 1 – 14 of 14) sorted by relevance

/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c648 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
650 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c780 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
782 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c620 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
622 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c653 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
655 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c784 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
786 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c653 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
655 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h95 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h84 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h93 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h92 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h90 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h94 #define TIMER_CTL1_CCSE BIT(0) /*!< commutation control shadow enable… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c395 TIMER_CTL1(timer_periph) |= (uint32_t)TIMER_CTL1_CCSE; in timer_channel_control_shadow_config()
397 TIMER_CTL1(timer_periph) &= (~(uint32_t)TIMER_CTL1_CCSE); in timer_channel_control_shadow_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h102 #define TIMER_CTL1_CCSE BIT(0) /*!< commutatio… macro