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Searched refs:TIMER_CHCTL2_CH2NEN (Results 1 – 13 of 13) sorted by relevance

/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c790 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1206 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c922 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1338 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c761 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1178 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c795 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1211 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c934 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1356 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c794 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_output_config()
1211 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2NEN); in timer_channel_complementary_output_state_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h205 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h194 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h203 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h202 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h201 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h204 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 complementary output en… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h250 #define TIMER_CHCTL2_CH2NEN BIT(10) /*!< channel 2 … macro