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Searched refs:TIMER_CHCTL2 (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c853 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
856 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
858 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
860 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
864 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
866 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
868 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
870 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
884 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
887 TIMER_CHCTL2(timer_periph) |= (uint32_t)(ocpara->outputstate << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c717 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
720 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
722 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
724 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
728 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
730 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
732 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
734 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
748 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
751 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)ocpara->outputstate << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c849 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
852 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
854 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
856 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
860 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
862 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
864 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
866 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
880 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
883 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)ocpara->outputstate << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c689 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
691 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
693 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
695 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
699 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
701 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
703 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
705 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
720 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
722 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c722 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
725 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
727 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
729 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
733 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
735 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
737 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
739 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
753 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
756 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c722 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
724 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
726 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
728 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
732 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NEN); in timer_channel_output_config()
734 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
736 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0NP); in timer_channel_output_config()
738 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
753 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
755 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c717 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
719 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
721 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0P); in timer_channel_output_config()
723 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocpolarity; in timer_channel_output_config()
728 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_MCH0EN); in timer_channel_output_config()
730 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputnstate; in timer_channel_output_config()
733 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_MCH0P); in timer_channel_output_config()
735 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->ocnpolarity; in timer_channel_output_config()
752 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
754 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 4U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c502 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH0EN); in timer_channel_output_config()
505 TIMER_CHCTL2(timer_periph) |= (uint32_t)ocpara->outputstate; in timer_channel_output_config()
507 ctl = TIMER_CHCTL2(timer_periph); in timer_channel_output_config()
510 TIMER_CHCTL2(timer_periph) = ctl; in timer_channel_output_config()
515 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH1EN); in timer_channel_output_config()
518 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 4U); in timer_channel_output_config()
520 ctl = TIMER_CHCTL2(timer_periph); in timer_channel_output_config()
523 TIMER_CHCTL2(timer_periph) = ctl; in timer_channel_output_config()
528 TIMER_CHCTL2(timer_periph) &= (~(uint32_t)TIMER_CHCTL2_CH2EN); in timer_channel_output_config()
531 TIMER_CHCTL2(timer_periph) |= (uint32_t)((uint32_t)(ocpara->outputstate) << 8U); in timer_channel_output_config()
[all …]
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h57 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h68 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h59 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h67 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h65 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h63 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x00000020U) /*!< TIMER channel c… macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h68 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x20U) /*!< TIMER channel contr… macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h58 #define TIMER_CHCTL2(timerx) REG32((timerx) + 0x00000020U) /*!< TIMER chan… macro