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Searched refs:TIMER_CHCTL1_CH2MS (Results 1 – 16 of 16) sorted by relevance

/hal_gigadevice-latest/gd32l23x/standard_peripheral/source/
Dgd32l23x_timer.c529 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1019 ctl &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/
Dgd32f4xx_timer.c780 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1296 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f403/standard_peripheral/source/
Dgd32f403_timer.c912 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1428 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32vf103/standard_peripheral/source/
Dgd32vf103_timer.c777 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1271 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32e50x/standard_peripheral/source/
Dgd32e50x_timer.c785 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1301 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/
Dgd32f3x0_timer.c924 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1446 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32e10x/standard_peripheral/source/
Dgd32e10x_timer.c810 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1304 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32l23x/standard_peripheral/include/
Dgd32l23x_timer.h149 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/
Dgd32f4xx_timer.h178 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32vf103/standard_peripheral/include/
Dgd32vf103_timer.h167 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32e50x/standard_peripheral/include/
Dgd32e50x_timer.h176 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32f403/standard_peripheral/include/
Dgd32f403_timer.h175 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/
Dgd32f3x0_timer.h174 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32e10x/standard_peripheral/include/
Dgd32e10x_timer.h177 #define TIMER_CHCTL1_CH2MS BITS(0,1) /*!< channel 2 mode selection */ macro
/hal_gigadevice-latest/gd32a50x/standard_peripheral/source/
Dgd32a50x_timer.c811 TIMER_CHCTL1(timer_periph) &= ~(uint32_t)TIMER_CHCTL1_CH2MS; in timer_channel_output_config()
1446 TIMER_CHCTL1(timer_periph) &= (~(uint32_t)TIMER_CHCTL1_CH2MS); in timer_input_capture_config()
/hal_gigadevice-latest/gd32a50x/standard_peripheral/include/
Dgd32a50x_timer.h221 #define TIMER_CHCTL1_CH2MS (TIMER_CHCTL1_CH2MS_BIT2 | BITS(0,1)) /*!< channel 2 … macro