| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/source/ |
| D | gd32f3x0_dma.c | 54 DMA_CHPADDR(channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
104 DMA_CHPADDR(channelx) = init_struct->periph_addr; in dma_init()
229 DMA_CHPADDR(channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/source/ |
| D | gd32f4xx_dma.c | 58 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
140 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_single_data_mode_init()
209 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_multi_data_mode_init()
260 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/source/ |
| D | gd32vf103_dma.c | 65 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
119 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_init()
286 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/source/ |
| D | gd32e50x_dma.c | 66 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
128 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_init()
295 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/source/ |
| D | gd32f403_dma.c | 66 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
124 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_init()
290 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/source/ |
| D | gd32e10x_dma.c | 67 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
125 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_init()
292 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/source/ |
| D | gd32l23x_dma.c | 55 DMA_CHPADDR(channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
125 DMA_CHPADDR(channelx) = init_struct->periph_addr; in dma_init()
253 DMA_CHPADDR(channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/source/ |
| D | gd32a50x_dma.c | 57 DMA_CHPADDR(dma_periph, channelx) = DMA_CHPADDR_RESET_VALUE; in dma_deinit()
137 DMA_CHPADDR(dma_periph, channelx) = init_struct->periph_addr; in dma_init()
277 DMA_CHPADDR(dma_periph, channelx) = address; in dma_periph_address_config()
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| /hal_gigadevice-latest/gd32f3x0/standard_peripheral/include/ |
| D | gd32f3x0_dma.h | 159 #define DMA_CHPADDR(channel) REG32(DMA_CHXPADDR_BASE + (uint32_t)0x0000014U * (uint32_… macro
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| /hal_gigadevice-latest/gd32vf103/standard_peripheral/include/ |
| D | gd32vf103_dma.h | 154 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … macro
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| /hal_gigadevice-latest/gd32e50x/standard_peripheral/include/ |
| D | gd32e50x_dma.h | 154 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x00000010U) + 0x00000014U * (uint32_t)(… macro
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| /hal_gigadevice-latest/gd32f403/standard_peripheral/include/ |
| D | gd32f403_dma.h | 153 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … macro
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| /hal_gigadevice-latest/gd32e10x/standard_peripheral/include/ |
| D | gd32e10x_dma.h | 147 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x10U) + 0x14U * (uint32_t)(channel)) … macro
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| /hal_gigadevice-latest/gd32f4xx/standard_peripheral/include/ |
| D | gd32f4xx_dma.h | 232 #define DMA_CHPADDR(dma,channel) REG32(((dma) + 0x18U) + 0x18U*(channel)) /*!< the addres… macro
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| /hal_gigadevice-latest/gd32l23x/standard_peripheral/include/ |
| D | gd32l23x_dma.h | 325 #define DMA_CHPADDR(channel) REG32(DMA_CHXPADDR_BASE + 0x14U * (uint32_t)(channel)) … macro
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| /hal_gigadevice-latest/gd32a50x/standard_peripheral/include/ |
| D | gd32a50x_dma.h | 376 #define DMA_CHPADDR(dma, channel) REG32(((dma) + 0x00000010U) + 0x14U * (uint32_t)(ch… macro
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