Searched refs:CFG1_PREDV0 (Results 1 – 4 of 4) sorted by relevance
540 #define CFG1_PREDV0(regval) (BITS(0,3) & ((uint32_t)(regval) << 0)) macro541 #define RCU_PREDV0_DIV1 CFG1_PREDV0(0) /*!< PREDV0 input sourc…542 #define RCU_PREDV0_DIV2 CFG1_PREDV0(1) /*!< PREDV0 input sourc…543 #define RCU_PREDV0_DIV3 CFG1_PREDV0(2) /*!< PREDV0 input sourc…544 #define RCU_PREDV0_DIV4 CFG1_PREDV0(3) /*!< PREDV0 input sourc…545 #define RCU_PREDV0_DIV5 CFG1_PREDV0(4) /*!< PREDV0 input sourc…546 #define RCU_PREDV0_DIV6 CFG1_PREDV0(5) /*!< PREDV0 input sourc…547 #define RCU_PREDV0_DIV7 CFG1_PREDV0(6) /*!< PREDV0 input sourc…548 #define RCU_PREDV0_DIV8 CFG1_PREDV0(7) /*!< PREDV0 input sourc…549 #define RCU_PREDV0_DIV9 CFG1_PREDV0(8) /*!< PREDV0 input sourc…[all …]
633 #define CFG1_PREDV0(regval) (BITS(0,3) & ((uint32_t)(regval) << 0)) macro634 #define RCU_PREDV0_DIV1 CFG1_PREDV0(0) /*!< PREDV0 input sourc…635 #define RCU_PREDV0_DIV2 CFG1_PREDV0(1) /*!< PREDV0 input sourc…636 #define RCU_PREDV0_DIV3 CFG1_PREDV0(2) /*!< PREDV0 input sourc…637 #define RCU_PREDV0_DIV4 CFG1_PREDV0(3) /*!< PREDV0 input sourc…638 #define RCU_PREDV0_DIV5 CFG1_PREDV0(4) /*!< PREDV0 input sourc…639 #define RCU_PREDV0_DIV6 CFG1_PREDV0(5) /*!< PREDV0 input sourc…640 #define RCU_PREDV0_DIV7 CFG1_PREDV0(6) /*!< PREDV0 input sourc…641 #define RCU_PREDV0_DIV8 CFG1_PREDV0(7) /*!< PREDV0 input sourc…642 #define RCU_PREDV0_DIV9 CFG1_PREDV0(8) /*!< PREDV0 input sourc…[all …]
672 #define CFG1_PREDV0(regval) (BITS(0,3) & ((uint32_t)(regval) << 0)) macro673 #define RCU_PREDV0_DIV1 CFG1_PREDV0(0) /*!< PREDV0 input sourc…674 #define RCU_PREDV0_DIV2 CFG1_PREDV0(1) /*!< PREDV0 input sourc…675 #define RCU_PREDV0_DIV3 CFG1_PREDV0(2) /*!< PREDV0 input sourc…676 #define RCU_PREDV0_DIV4 CFG1_PREDV0(3) /*!< PREDV0 input sourc…677 #define RCU_PREDV0_DIV5 CFG1_PREDV0(4) /*!< PREDV0 input sourc…678 #define RCU_PREDV0_DIV6 CFG1_PREDV0(5) /*!< PREDV0 input sourc…679 #define RCU_PREDV0_DIV7 CFG1_PREDV0(6) /*!< PREDV0 input sourc…680 #define RCU_PREDV0_DIV8 CFG1_PREDV0(7) /*!< PREDV0 input sourc…681 #define RCU_PREDV0_DIV9 CFG1_PREDV0(8) /*!< PREDV0 input sourc…[all …]
1005 #define CFG1_PREDV0(regval) (BITS(0,3) & ((uint32_t)(regval) << 0)) macro1006 #define RCU_PREDV0_DIV1 CFG1_PREDV0(0) /*!< PREDV0 input sourc…1007 #define RCU_PREDV0_DIV2 CFG1_PREDV0(1) /*!< PREDV0 input sourc…1008 #define RCU_PREDV0_DIV3 CFG1_PREDV0(2) /*!< PREDV0 input sourc…1009 #define RCU_PREDV0_DIV4 CFG1_PREDV0(3) /*!< PREDV0 input sourc…1010 #define RCU_PREDV0_DIV5 CFG1_PREDV0(4) /*!< PREDV0 input sourc…1011 #define RCU_PREDV0_DIV6 CFG1_PREDV0(5) /*!< PREDV0 input sourc…1012 #define RCU_PREDV0_DIV7 CFG1_PREDV0(6) /*!< PREDV0 input sourc…1013 #define RCU_PREDV0_DIV8 CFG1_PREDV0(7) /*!< PREDV0 input sourc…1014 #define RCU_PREDV0_DIV9 CFG1_PREDV0(8) /*!< PREDV0 input sourc…[all …]
