Home
last modified time | relevance | path

Searched refs:valid (Results 1 – 25 of 50) sorted by relevance

12

/hal_espressif-latest/components/esp_hw_support/dma/
Dasync_memcpy_impl_gdma.c142 bool valid = true; in async_memcpy_impl_is_buffer_address_valid() local
145 valid = valid && (((intptr_t)dst & (impl->psram_trans_align - 1)) == 0); in async_memcpy_impl_is_buffer_address_valid()
149 valid = valid && (((intptr_t)dst & (impl->sram_trans_align - 1)) == 0); in async_memcpy_impl_is_buffer_address_valid()
152 return valid; in async_memcpy_impl_is_buffer_address_valid()
/hal_espressif-latest/components/hal/
Dadc_oneshot_hal.c127 bool valid = true; in adc_oneshot_hal_convert() local
148 valid = adc_oneshot_ll_raw_check_valid(ADC_UNIT_2, *out_raw); in adc_oneshot_hal_convert()
149 if (!valid) { in adc_oneshot_hal_convert()
156 return valid; in adc_oneshot_hal_convert()
Dadc_hal.c321 goto valid; in adc_hal_get_reading_result()
330 goto valid; in adc_hal_get_reading_result()
334 valid: in adc_hal_get_reading_result()
/hal_espressif-latest/components/hal/esp32s3/include/hal/
Dmmu_ll.h98 bool valid = false; in mmu_ll_check_valid_ext_vaddr_region() local
101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
108 return valid; in mmu_ll_check_valid_ext_vaddr_region()
Dtwai_ll.h390 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
392 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
393 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/hal/esp32c3/include/hal/
Dmmu_ll.h98 bool valid = false; in mmu_ll_check_valid_ext_vaddr_region() local
101 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
108 return valid; in mmu_ll_check_valid_ext_vaddr_region()
Dtwai_ll.h390 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
392 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
393 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/hal/esp32c2/include/hal/
Dmmu_ll.h97 bool valid = false; in mmu_ll_check_valid_ext_vaddr_region() local
100 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
104 valid |= (ADDRESS_IN_DRAM0_CACHE(vaddr_start) && ADDRESS_IN_DRAM0_CACHE(vaddr_end)); in mmu_ll_check_valid_ext_vaddr_region()
107 return valid; in mmu_ll_check_valid_ext_vaddr_region()
/hal_espressif-latest/components/hal/esp32s2/include/hal/
Dmmu_ll.h98 bool valid = false; in mmu_ll_check_valid_ext_vaddr_region() local
101 …valid |= ((vaddr_start >= DROM0_ADDRESS_LOW) && (vaddr_end < DROM0_ADDRESS_HIGH)) || ((vaddr_start… in mmu_ll_check_valid_ext_vaddr_region()
105 valid |= ((vaddr_start >= IRAM0_CACHE_ADDRESS_LOW) && (vaddr_end < IRAM1_ADDRESS_HIGH)); in mmu_ll_check_valid_ext_vaddr_region()
108 return valid; in mmu_ll_check_valid_ext_vaddr_region()
Dtwai_ll.h390 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
392 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
393 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/hal/esp32c6/include/hal/
Dtwai_ll.h115 bool valid = true; in twai_ll_set_clock_source() local
122 valid = false; in twai_ll_set_clock_source()
126 if (valid) { in twai_ll_set_clock_source()
411 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
413 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
414 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/hal/esp32/include/hal/
Dmmu_ll.h100 bool valid = false; in mmu_ll_check_valid_ext_vaddr_region() local
103 valid |= (ADDRESS_IN_DRAM1_CACHE(vaddr_start) && ADDRESS_IN_DRAM1_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
108 valid |= (ADDRESS_IN_IRAM0_CACHE(vaddr_start) && ADDRESS_IN_IRAM0_CACHE(vaddr_end)) || in mmu_ll_check_valid_ext_vaddr_region()
113 return valid; in mmu_ll_check_valid_ext_vaddr_region()
Dtwai_ll.h461 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
463 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
466 valid = valid && !(brp & 0x03); in twai_ll_check_brp_validation()
468 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/heap/
Dmulti_heap.c331 bool valid = true; in multi_heap_check() local
343 valid = false; in multi_heap_check()
347 valid = false; in multi_heap_check()
351 return valid; in multi_heap_check()
Dmulti_heap_poisoning.c147 bool valid = true; in verify_fill_pattern() local
157 valid = false; in verify_fill_pattern()
180 valid = false; in verify_fill_pattern()
189 return valid; in verify_fill_pattern()
Dheap_caps.c606 bool valid = true; in heap_caps_check_integrity() local
612 valid = multi_heap_check(heap->heap, print_errors) && valid; in heap_caps_check_integrity()
616 return valid; in heap_caps_check_integrity()
/hal_espressif-latest/components/bt/host/bluedroid/bta/dm/
Dbta_dm_co.c220 void bta_dm_co_loc_oob(BOOLEAN valid, BT_OCTET16 c, BT_OCTET16 r) in bta_dm_co_loc_oob() argument
223 BTIF_TRACE_DEBUG("bta_dm_co_loc_oob, valid = %d", valid); in bta_dm_co_loc_oob()
225 btif_dm_proc_loc_oob(valid, c, r); in bta_dm_co_loc_oob()
/hal_espressif-latest/components/hal/esp32h2/include/hal/
Dtwai_ll.h397 bool valid = (brp >= SOC_TWAI_BRP_MIN) && (brp <= SOC_TWAI_BRP_MAX); in twai_ll_check_brp_validation() local
399 valid = valid && !(brp & 0x01); in twai_ll_check_brp_validation()
400 return valid; in twai_ll_check_brp_validation()
/hal_espressif-latest/components/esp_adc/
Dadc_oneshot.c183 bool valid = false; in adc_oneshot_read() local
184 valid = adc_oneshot_hal_convert(&(handle->hal), out_raw); in adc_oneshot_read()
189 return valid ? ESP_OK : ESP_ERR_TIMEOUT; in adc_oneshot_read()
/hal_espressif-latest/components/bt/host/bluedroid/bta/include/bta/
Dbta_dm_co.h114 extern void bta_dm_co_loc_oob(BOOLEAN valid, BT_OCTET16 c, BT_OCTET16 r);
/hal_espressif-latest/components/bt/esp_ble_mesh/mesh_core/
Dfriend.h27 bool valid, bool established);
Dsettings.c61 valid:1, /* 1 if this entry is valid, 0 if not */ member
149 bool valid; member
607 stored_cfg.valid = false; in cfg_set()
614 stored_cfg.valid = false; in cfg_set()
623 stored_cfg.valid = true; in cfg_set()
1435 if (cfg && stored_cfg.valid) { in settings_core_commit()
1814 if (!update->valid) { in store_pending_keys()
1844 update->valid = 0U; in store_pending_keys()
2157 if (!update->valid) { in key_update_find()
2193 free_slot->valid = 1U; in bt_mesh_store_subnet()
[all …]
/hal_espressif-latest/components/efuse/esp32/
Desp_efuse_table.csv118 … EFUSE_BLK3, 96, 7, [] ADC1 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_P…
119 … EFUSE_BLK3, 103, 9, [] ADC1 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_P…
120 … EFUSE_BLK3, 112, 7, [] ADC2 Two Point calibration low point. Only valid if EFUSE_RD_BLK3_P…
121 … EFUSE_BLK3, 119, 9, [] ADC2 Two Point calibration high point. Only valid if EFUSE_RD_BLK3_P…
/hal_espressif-latest/components/xtensa/include/xtensa/
Dhal.h1172 #define XTHAL_MPU_ENTRY(vaddr, valid, access, memtype) \ argument
1173 { (((vaddr) & 0xffffffe0) | ((valid & 0x1))), \
1186 #define XTHAL_MPU_ENTRY_SET_VALID(x, valid) (x).as = \ argument
1187 (((x).as & 0xfffffffe) | ((valid) & 0x1))
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Dcache.h124 uint32_t valid: 1; /*!< the tag item is valid or not */ member
134 uint32_t valid: 1; /*!< the tag item is valid or not */ member

12