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Searched refs:owner (Results 1 – 25 of 48) sorted by relevance

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/hal_espressif-latest/components/esp_hw_support/
Dsleep_system_peripheral.c42 …_MATRIX_BASE, DR_REG_INTERRUPT_MATRIX_BASE, N_REGS_INTR_MATRIX(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_intr_matrix_retention_init()
56 …DR_REG_HP_SYSTEM_BASE, DR_REG_HP_SYSTEM_BASE, N_REGS_HP_SYSTEM(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_hp_system_retention_init()
71 …PM_LINK(0), DR_REG_HP_APM_BASE, DR_REG_HP_APM_BASE, N_REGS_APM(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_tee_apm_retention_init()
72 …PM_LINK(1), DR_REG_TEE_BASE, DR_REG_TEE_BASE, N_REGS_TEE(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_tee_apm_retention_init()
78 …WRITE_INIT(REGDMA_TEEAPM_LINK(2), TEE_M4_MODE_CTRL_REG, 0x0, 0xffffffff, 1, 0), .owner = ENTRY(2) } in sleep_sys_periph_tee_apm_retention_init()
92 …00), UART_INT_RAW_REG(0), UART_INT_RAW_REG(0), N_REGS_UART(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_uart0_retention_init()
94 …01), UART_REG_UPDATE_REG(0), UART_REG_UPDATE, UART_REG_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_uart0_retention_init()
95 …02), UART_REG_UPDATE_REG(0), 0x0, UART_REG_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_uart0_retention_init()
110 …OTECT_REG(0), TIMG_WDT_WKEY_VALUE, TIMG_WDT_WKEY_M, 1, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_tg0_retention_init()
111 …SE(0), REG_TIMG_BASE(0), N_REGS_TG(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_sys_periph_tg0_retention_init()
[all …]
Dsleep_retention.c211 static inline bool sleep_retention_entries_require_branch(uint32_t owner, uint32_t runtime_bitmap) in sleep_retention_entries_require_branch() argument
213 bool use_new_entry = SLEEP_RETENTION_ENTRY_BITMAP(owner & ~runtime_bitmap) ? true : false; in sleep_retention_entries_require_branch()
214 bool intersection_exist = SLEEP_RETENTION_ENTRY_BITMAP(owner & runtime_bitmap) ? true : false; in sleep_retention_entries_require_branch()
218 static esp_err_t sleep_retention_entries_check_and_create_default(uint32_t owner, uint32_t runtime_… in sleep_retention_entries_check_and_create_default() argument
220 assert(sleep_retention_entries_require_branch(owner, runtime_bitmap)); in sleep_retention_entries_check_and_create_default()
223 dummy.owner = SLEEP_RETENTION_ENTRY_BITMAP(owner & ~entries_bitmap); in sleep_retention_entries_check_and_create_default()
224 if (dummy.owner) { in sleep_retention_entries_check_and_create_default()
243 static void sleep_retention_entries_update(uint32_t owner, void *new_link, regdma_link_priority_t p… in sleep_retention_entries_update() argument
247 (owner & BIT(0)) ? new_link : s_retention.lists[priority].entries[0], in sleep_retention_entries_update()
248 (owner & BIT(1)) ? new_link : s_retention.lists[priority].entries[1], in sleep_retention_entries_update()
[all …]
Dsleep_clock.c40 …E, DR_REG_PCR_BASE, N_REGS_PCR(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_system_retention_init()
41 …T_BYPASS_REG, PCR_RESET_EVENT_BYPASS_REG, 1, 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_system_retention_init()
43 …DATE_REG, PCR_BUS_CLOCK_UPDATE, PCR_BUS_CLOCK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_system_retention_init()
44 …DATE_REG, 0x0, PCR_BUS_CLOCK_UPDATE_M, 1, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_system_retention_init()
68 …YSCON_TEST_CONF_REG, MODEM_SYSCON_TEST_CONF_REG, N_REGS_SYSCON(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_modem_retention_init()
70 …REG, MODEM_WIFI_RETENTION_CLOCK, MODEM_WIFI_RETENTION_CLOCK_MASK, 0, 0), .owner = ENTRY(0) }, /* W… in sleep_clock_modem_retention_init()
73 …M_LPCON_TEST_CONF_REG, MODEM_LPCON_TEST_CONF_REG, N_REGS_LPCON(), 0, 0), .owner = ENTRY(0) | ENTRY… in sleep_clock_modem_retention_init()
78 …CON_CLK_CONF1_FORCE_ON_REG, 0x0, MODEM_WIFI_RETENTION_CLOCK_MASK, 0, 0), .owner = ENTRY(0) } /* W… in sleep_clock_modem_retention_init()
/hal_espressif-latest/components/esp_hw_support/include/
Dspinlock.h31 #define SPINLOCK_INITIALIZER {.owner = SPINLOCK_FREE,.count = 0}
35 NEED_VOLATILE_MUX uint32_t owner; member
47 lock->owner = SPINLOCK_FREE; in spinlock_initialize()
89 if (lock->owner == core_id) { in spinlock_acquire()
103 lock_set = esp_cpu_compare_and_set(&lock->owner, SPINLOCK_FREE, core_id); in spinlock_acquire()
112 lock_set = esp_cpu_compare_and_set(&lock->owner, SPINLOCK_FREE, core_id); in spinlock_acquire()
121 assert(lock->owner == core_id); in spinlock_acquire()
125 assert(lock->owner == SPINLOCK_FREE || lock->owner == other_core_id); in spinlock_acquire()
160 assert(core_id == lock->owner); // This is a lock that we didn't acquire, or the lock is corrupt in spinlock_release()
164 lock->owner = SPINLOCK_FREE; in spinlock_release()
/hal_espressif-latest/components/esp_rom/include/esp32s2/rom/
Dlldesc.h94 …t8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
103 lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
118 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
120 ds->owner = owner; in lldesc_config()
127 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32/rom/
Dlldesc.h94 …t8_t *descptr, uint32_t desclen, uint8_t * mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
103 lldesc_t *lldesc_set_owner(lldesc_t * head, uint16_t nblks, uint8_t owner);
118 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
120 ds->owner = owner; in lldesc_config()
127 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32c6/rom/
Dlldesc.h94 …nt8_t *descptr, uint32_t desclen, uint8_t *mblkptr, uint32_t buflen, uint32_t blksz, uint8_t owner,
114 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
116 ds->owner = owner; in lldesc_config()
123 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32c2/rom/
Dlldesc.h107 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
109 ds->owner = owner; in lldesc_config()
116 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32c3/rom/
Dlldesc.h107 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
109 ds->owner = owner; in lldesc_config()
116 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32h2/rom/
Dlldesc.h107 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
109 ds->owner = owner; in lldesc_config()
116 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_rom/include/esp32s3/rom/
Dlldesc.h104 static inline void lldesc_config(lldesc_t *ds, uint8_t owner, uint8_t eof, uint8_t sosf, uint16_t l… in lldesc_config() argument
106 ds->owner = owner; in lldesc_config()
114 (_desc)->owner = (_owner); \
/hal_espressif-latest/components/esp_hw_support/dma/
Desp_async_memcpy.c70 mcp_hdl->out_streams[i].desc.dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_CPU; in esp_async_memcpy_install()
72 mcp_hdl->in_streams[i].desc.dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_CPU; in esp_async_memcpy_install()
135 if (desc->dw0.owner != DMA_DESCRIPTOR_BUFFER_OWNER_DMA) { in async_memcpy_prepare_receive()
148 if (desc->dw0.owner != DMA_DESCRIPTOR_BUFFER_OWNER_DMA) { in async_memcpy_prepare_receive()
176 if (desc->dw0.owner != DMA_DESCRIPTOR_BUFFER_OWNER_DMA) { in async_memcpy_prepare_transmit()
190 if (desc->dw0.owner != DMA_DESCRIPTOR_BUFFER_OWNER_DMA) { in async_memcpy_prepare_transmit()
214 if (next->dw0.owner == DMA_DESCRIPTOR_BUFFER_OWNER_CPU) { in async_memcpy_get_next_rx_descriptor()
256 desc->dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA; in esp_async_memcpy()
259 desc->dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA; in esp_async_memcpy()
264 desc->dw0.owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA; in esp_async_memcpy()
[all …]
/hal_espressif-latest/components/esp_hw_support/port/esp32c6/private_include/
Dsleep_gdma_retention_context.inc26 .owner = ENTRY(0) | ENTRY(2) },
44 .owner = ENTRY(0) | ENTRY(2) },
65 .owner = ENTRY(0) | ENTRY(2) },
71 .owner = ENTRY(0) | ENTRY(2) },
/hal_espressif-latest/components/esp_hw_support/port/esp32h2/private_include/
Dsleep_gdma_retention_context.inc26 .owner = ENTRY(0) | ENTRY(2) },
44 .owner = ENTRY(0) | ENTRY(2) },
65 .owner = ENTRY(0) | ENTRY(2) },
71 .owner = ENTRY(0) | ENTRY(2) },
/hal_espressif-latest/components/esp_phy/src/
Dbtbb_init.c34 …BT_BB_LINK(0x00), BB_PART_0_ADDR, BB_PART_0_ADDR, BB_PART_0_SIZE, 0, 0), .owner = BTBB_LINK_OWNER … in btbb_sleep_retention_init()
35 …BT_BB_LINK(0x01), BB_PART_1_ADDR, BB_PART_1_ADDR, BB_PART_1_SIZE, 0, 0), .owner = BTBB_LINK_OWNER … in btbb_sleep_retention_init()
36 …BT_BB_LINK(0x02), BB_PART_2_ADDR, BB_PART_2_ADDR, BB_PART_2_SIZE, 0, 0), .owner = BTBB_LINK_OWNER } in btbb_sleep_retention_init()
/hal_espressif-latest/components/mbedtls/port/aes/dma/
Desp_aes_gdma_impl.c26 return (output->owner == 0); in esp_aes_dma_done()
Desp_aes_crypto_dma_impl.c41 return (crypto_dma_ll_inlink_is_eof() && (output->owner == 0)); in esp_aes_dma_done()
/hal_espressif-latest/components/esp_rom/include/
Desp_rom_lldesc.h35 owner : 1; /* hw or sw */ member
/hal_espressif-latest/components/hal/
Dsdio_slave_hal.c258 .owner = 1,
533 .owner = 1, in sdio_slave_hal_send_queue()
554 while(desc && desc->owner == 0) { in recv_get_first_empty_buf()
572 if (hal->recv_cur_ret == NULL || hal->recv_cur_ret->owner != 0) return false; in sdio_slave_hal_recv_has_next_item()
636 assert (desc != NULL && desc->owner == 0); in sdio_slave_hal_recv_flush_one_buffer()
638 desc->owner = 1; in sdio_slave_hal_recv_flush_one_buffer()
647 desc->owner = 1; in sdio_slave_hal_load_buf()
671 …"=> %p: size: %d(%d), eof: %d, owner: %d", item, item->size, item->length, item->eof, item->owner); in show_queue_item()
Dspi_slave_hal_iram.c112 for (i = 0; hal->dmadesc_rx[i].eof == 0 && hal->dmadesc_rx[i].owner == 0; i++) {} in spi_slave_hal_dma_need_reset()
113 if (hal->dmadesc_rx[i].owner) { in spi_slave_hal_dma_need_reset()
/hal_espressif-latest/components/hal/include/hal/
Ddma_types.h28 …uint32_t owner : 1; /*!< Who is allowed to access the buffer that this descriptor points t… member
/hal_espressif-latest/components/driver/deprecated/driver/
Drmt.h247 esp_err_t rmt_set_memory_owner(rmt_channel_t channel, rmt_mem_owner_t owner);
259 esp_err_t rmt_get_memory_owner(rmt_channel_t channel, rmt_mem_owner_t *owner);
/hal_espressif-latest/components/hal/esp32c2/
Drtc_cntl_hal.c30 plink->owner = 1; in rtc_cntl_hal_dma_link_init()
/hal_espressif-latest/components/soc/
Dlldesc.c23 dmadesc[n].owner = 1; in lldesc_setup_link_constrained()
/hal_espressif-latest/components/hal/esp32c3/
Drtc_cntl_hal.c39 plink->owner = DMA_DESCRIPTOR_BUFFER_OWNER_DMA; in rtc_cntl_hal_dma_link_init()

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