1 /* 2 * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 7 // The HAL layer for RTC CNTL (common part) 8 9 #include "soc/soc_caps.h" 10 #include "soc/lldesc.h" 11 #include "hal/rtc_hal.h" 12 #include "hal/assert.h" 13 #include "esp_attr.h" 14 15 #define RTC_CNTL_HAL_LINK_BUF_SIZE_MIN (SOC_RTC_CNTL_CPU_PD_DMA_BLOCK_SIZE) /* The minimum size of dma link buffer */ 16 17 typedef struct rtc_cntl_link_buf_conf { 18 uint32_t cfg[4]; /* 4 word for dma link buffer configuration */ 19 } rtc_cntl_link_buf_conf_t; 20 rtc_cntl_hal_dma_link_init(void * elem,void * buff,int size,void * next)21void * rtc_cntl_hal_dma_link_init(void *elem, void *buff, int size, void *next) 22 { 23 HAL_ASSERT(elem != NULL); 24 HAL_ASSERT(buff != NULL); 25 HAL_ASSERT(size >= RTC_CNTL_HAL_LINK_BUF_SIZE_MIN); 26 27 lldesc_t *plink = (lldesc_t *)elem; 28 29 plink->eof = next ? 0 : 1; 30 plink->owner = 1; 31 plink->size = size >> 4; /* in unit of 16 bytes */ 32 plink->length = size >> 4; 33 plink->buf = buff; 34 plink->offset = 0; 35 plink->sosf = 0; 36 STAILQ_NEXT(plink, qe) = next; 37 return (void *)plink; 38 } 39 40 #if SOC_PM_SUPPORT_CPU_PD rtc_cntl_hal_enable_cpu_retention(void * addr)41void rtc_cntl_hal_enable_cpu_retention(void *addr) 42 { 43 if (addr) { 44 lldesc_t *plink = (lldesc_t *)addr; 45 46 /* dma link buffer configure */ 47 rtc_cntl_link_buf_conf_t *pbuf = (rtc_cntl_link_buf_conf_t *)plink->buf; 48 pbuf->cfg[0] = 0; 49 pbuf->cfg[1] = 0; 50 pbuf->cfg[2] = 0; 51 pbuf->cfg[3] = (uint32_t)-1; 52 53 rtc_cntl_ll_enable_cpu_retention((uint32_t)addr); 54 } 55 } 56 rtc_cntl_hal_disable_cpu_retention(void * addr)57void IRAM_ATTR rtc_cntl_hal_disable_cpu_retention(void *addr) 58 { 59 rtc_cntl_sleep_retent_t *retent = (rtc_cntl_sleep_retent_t *)addr; 60 61 if (addr) { 62 if (retent->cpu_pd_mem) { 63 rtc_cntl_ll_disable_cpu_retention(); 64 } 65 } 66 } 67 68 #endif // SOC_PM_SUPPORT_CPU_PD 69
