/hal_espressif-latest/components/wpa_supplicant/src/crypto/ |
D | aes_i.h | 33 #define RCON(i) rcon[(i)] argument 35 #define TE0(i) Te0[((i) >> 24) & 0xff] argument 36 #define TE1(i) Te1[((i) >> 16) & 0xff] argument 37 #define TE2(i) Te2[((i) >> 8) & 0xff] argument 38 #define TE3(i) Te3[(i) & 0xff] argument 39 #define TE41(i) (Te4[((i) >> 24) & 0xff] & 0xff000000) argument 40 #define TE42(i) (Te4[((i) >> 16) & 0xff] & 0x00ff0000) argument 41 #define TE43(i) (Te4[((i) >> 8) & 0xff] & 0x0000ff00) argument 42 #define TE44(i) (Te4[(i) & 0xff] & 0x000000ff) argument 43 #define TE421(i) (Te4[((i) >> 16) & 0xff] & 0xff000000) argument [all …]
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D | aes-siv.c | 22 int i, carry; in dbl() local 25 for (i = 0; i < AES_BLOCK_SIZE - 1; i++) in dbl() 26 pad[i] = (pad[i] << 1) | (pad[i + 1] >> 7); in dbl() 35 int i; in xor() local 37 for (i = 0; i < AES_BLOCK_SIZE; i++) in xor() 44 int i; in xorend() local 49 for (i = 0; i < blen; i++) in xorend() 50 a[alen - blen + i] ^= b[i]; in xorend() 70 size_t i; in aes_s2v() local 88 for (i = 0; i < num_elem - 1; i++) { in aes_s2v() [all …]
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D | rc4.c | 19 u32 i, j, k; in rc4_skip() local 24 for (i = 0; i < 256; i++) in rc4_skip() 25 S[i] = i; in rc4_skip() 28 for (i = 0; i < 256; i++) { in rc4_skip() 29 j = (j + S[i] + key[kpos]) & 0xff; in rc4_skip() 33 S_SWAP(i, j); in rc4_skip() 37 i = j = 0; in rc4_skip() 39 i = (i + 1) & 0xff; in rc4_skip() 40 j = (j + S[i]) & 0xff; in rc4_skip() 41 S_SWAP(i, j); in rc4_skip() [all …]
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D | sha256-internal.c | 29 size_t i; in sha256_vector() local 35 for (i = 0; i < num_elem; i++) in sha256_vector() 36 if (sha256_process(&ctx, addr[i], len[i])) in sha256_vector() 88 int i; in sha256_compress() local 91 for (i = 0; i < 8; i++) { in sha256_compress() 92 S[i] = md->state[i]; in sha256_compress() 96 for (i = 0; i < 16; i++) in sha256_compress() 97 W[i] = WPA_GET_BE32(buf + (4 * i)); in sha256_compress() 100 for (i = 16; i < 64; i++) { in sha256_compress() 101 W[i] = Gamma1(W[i - 2]) + W[i - 7] + Gamma0(W[i - 15]) + in sha256_compress() [all …]
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/hal_espressif-latest/components/bt/host/bluedroid/external/sbc/plc/ |
D | sbc_plc.c | 48 int i; in SqrtByCarmack() member 58 float_int.i = 0x5f375a86 - (float_int.i >> 1); in SqrtByCarmack() 136 int i; in AmplitudeMatch() local 141 for (i = 0; i < SBC_FS; i++){ in AmplitudeMatch() 142 sumx += absolute(y[SBC_LHIST - SBC_FS + i]); in AmplitudeMatch() 143 sumy += absolute(y[bestmatch + i]); in AmplitudeMatch() 209 int i = 0; in sbc_plc_bad_frame() local 224 for (i = 0; i < SBC_OLAL; i++){ in sbc_plc_bad_frame() 225 val = ZIRbuf[i] * rcos[i] in sbc_plc_bad_frame() 226 + sf * plc_state->hist[plc_state->bestlag + i] * rcos[SBC_OLAL - i - 1]; in sbc_plc_bad_frame() [all …]
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/hal_espressif-latest/components/bt/common/osi/ |
D | allocator.c | 52 int i; in osi_mem_dbg_init() local 54 for (i = 0; i < OSI_MEM_DBG_INFO_MAX; i++) { in osi_mem_dbg_init() 55 mem_dbg_info[i].p = NULL; in osi_mem_dbg_init() 56 mem_dbg_info[i].size = 0; in osi_mem_dbg_init() 57 mem_dbg_info[i].func = NULL; in osi_mem_dbg_init() 58 mem_dbg_info[i].line = 0; in osi_mem_dbg_init() 64 for (i = 0; i < OSI_MEM_DBG_MAX_SECTION_NUM; i++){ in osi_mem_dbg_init() 65 mem_dbg_max_size_section[i].used = false; in osi_mem_dbg_init() 66 mem_dbg_max_size_section[i].max_size = 0; in osi_mem_dbg_init() 72 int i; in osi_mem_dbg_record() local [all …]
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/hal_espressif-latest/components/bt/host/bluedroid/bta/gatt/ |
D | bta_gatts_utils.c | 66 UINT8 i; in bta_gatts_alloc_srvc_cb() local 68 for (i = 0; i < BTA_GATTS_MAX_SRVC_NUM; i ++) { in bta_gatts_alloc_srvc_cb() 69 if (!p_cb->srvc_cb[i].in_use) { in bta_gatts_alloc_srvc_cb() 70 p_cb->srvc_cb[i].in_use = TRUE; in bta_gatts_alloc_srvc_cb() 71 p_cb->srvc_cb[i].rcb_idx = rcb_idx; in bta_gatts_alloc_srvc_cb() 72 return i; in bta_gatts_alloc_srvc_cb() 89 UINT8 i; in bta_gatts_find_app_rcb_by_app_if() local 92 for (i = 0, p_reg = bta_gatts_cb.rcb; i < BTA_GATTS_MAX_APP_NUM; i ++, p_reg++) { in bta_gatts_find_app_rcb_by_app_if() 112 UINT8 i; in bta_gatts_find_app_rcb_idx_by_app_if() local 114 for (i = 0; i < BTA_GATTS_MAX_APP_NUM; i ++) { in bta_gatts_find_app_rcb_idx_by_app_if() [all …]
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/hal_espressif-latest/components/mbedtls/port/aes/ |
D | esp_aes_xts.c | 129 #define GET_UINT64_LE(n,b,i) \ argument 131 (n) = ( (uint64_t) (b)[(i) + 7] << 56 ) \ 132 | ( (uint64_t) (b)[(i) + 6] << 48 ) \ 133 | ( (uint64_t) (b)[(i) + 5] << 40 ) \ 134 | ( (uint64_t) (b)[(i) + 4] << 32 ) \ 135 | ( (uint64_t) (b)[(i) + 3] << 24 ) \ 136 | ( (uint64_t) (b)[(i) + 2] << 16 ) \ 137 | ( (uint64_t) (b)[(i) + 1] << 8 ) \ 138 | ( (uint64_t) (b)[(i) ] ); \ 143 #define PUT_UINT64_LE(n,b,i) \ argument [all …]
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/hal_espressif-latest/components/esp_rom/linux/ |
D | esp_rom_crc.c | 168 uint32_t i; in esp_rom_crc32_le() local 170 for(i=0;i<len;i++){ in esp_rom_crc32_le() 171 crc = crc32_le_table[(crc^buf[i])&0xff]^(crc>>8); in esp_rom_crc32_le() 178 uint32_t i; in esp_rom_crc32_be() local 180 for(i=0;i<len;i++){ in esp_rom_crc32_be() 181 crc = crc32_be_table[(crc>>24)^buf[i]]^(crc<<8); in esp_rom_crc32_be() 188 uint32_t i; in esp_rom_crc16_le() local 190 for(i = 0; i < len; i++) in esp_rom_crc16_le() 192 crc = crc16_le_table[(crc^buf[i])&0xff]^(crc>>8); in esp_rom_crc16_le() 199 uint32_t i; in esp_rom_crc16_be() local [all …]
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/hal_espressif-latest/components/esp_rom/patches/ |
D | esp_rom_crc.c | 94 unsigned int i; in esp_rom_crc8_be() local 96 for (i = 0; i < len; i++) { in esp_rom_crc8_be() 97 crc = crc8_be_table[crc ^ buf[i]]; in esp_rom_crc8_be() 104 unsigned int i; in esp_rom_crc16_be() local 106 for (i = 0; i < len; i++) { in esp_rom_crc16_be() 107 crc = crc16_be_table[(crc >> 8)^buf[i]] ^ (crc << 8); in esp_rom_crc16_be() 114 unsigned int i; in esp_rom_crc32_be() local 116 for (i = 0; i < len; i++) { in esp_rom_crc32_be() 117 crc = crc32_be_table[(crc >> 24)^buf[i]] ^ (crc << 8); in esp_rom_crc32_be() 202 uint32_t i; in esp_rom_crc8_le() local [all …]
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/hal_espressif-latest/components/soc/esp32/include/soc/ |
D | timer_group_reg.h | 34 #define REG_TIMG_BASE(i) (DR_REG_TIMERGROUP0_BASE + i*0x1000) argument 35 #define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0000) argument 80 #define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x0004) argument 88 #define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x0008) argument 96 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0x000c) argument 105 #define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x0010) argument 113 #define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x0014) argument 121 #define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x0018) argument 129 #define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x001c) argument 137 #define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x0020) argument [all …]
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/hal_espressif-latest/components/soc/esp32s3/include/soc/ |
D | timer_group_reg.h | 26 #define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0) argument 76 #define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x4) argument 89 #define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x8) argument 102 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) argument 114 #define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x10) argument 126 #define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x14) argument 138 #define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x18) argument 151 #define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x1c) argument 164 #define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x20) argument 177 #define TIMG_T1CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x24) argument [all …]
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/hal_espressif-latest/components/hal/esp32s2/include/hal/ |
D | aes_ll.h | 44 for (int i = 0; i < key_word_len; i++) { in aes_ll_write_key() local 45 memcpy(&key_word, key + 4 * i, 4); in aes_ll_write_key() 46 REG_WRITE(AES_KEY_BASE + i * 4, key_word); in aes_ll_write_key() 76 for (int i = 0; i < AES_BLOCK_WORDS; i++) { in aes_ll_write_block() local 77 memcpy(&input_word, (uint8_t*)input + 4 * i, 4); in aes_ll_write_block() 78 REG_WRITE(AES_TEXT_IN_BASE + i * 4, input_word); in aes_ll_write_block() 92 for (size_t i = 0; i < AES_BLOCK_WORDS; i++) { in aes_ll_read_block() local 93 output_word = REG_READ(AES_TEXT_OUT_BASE + (i * REG_WIDTH)); in aes_ll_read_block() 95 memcpy( (uint8_t*)output + i * 4, &output_word, sizeof(output_word)); in aes_ll_read_block() 182 for (int i = 0; i < IV_WORDS; i++ ) { in aes_ll_set_iv() local [all …]
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/hal_espressif-latest/components/heap/port/ |
D | memory_layout_utils.c | 87 for (size_t i = 0; i < count; i++) { in s_prepare_reserved_regions() local 89 reserved[i].start, reserved[i].end); in s_prepare_reserved_regions() 90 … reserved[i].start = reserved[i].start & ~3; /* expand all reserved areas to word boundaries */ in s_prepare_reserved_regions() 91 reserved[i].end = (reserved[i].end + 3) & ~3; in s_prepare_reserved_regions() 92 assert(reserved[i].start <= reserved[i].end); in s_prepare_reserved_regions() 93 if (i < count - 1) { in s_prepare_reserved_regions() 94 assert(reserved[i + 1].start > reserved[i].start); in s_prepare_reserved_regions() 95 if (reserved[i].end > reserved[i + 1].start) { in s_prepare_reserved_regions() 98 reserved[i].start, reserved[i].end, reserved[i + 1].start, in s_prepare_reserved_regions() 99 reserved[i + 1].end); in s_prepare_reserved_regions() [all …]
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/hal_espressif-latest/components/soc/esp32s2/include/soc/ |
D | timer_group_reg.h | 14 #define DR_REG_TIMG_BASE(i) REG_TIMG_BASE(i) argument 38 #define TIMG_T0CONFIG_REG(i) (DR_REG_TIMG_BASE(i) + 0x0) argument 104 #define TIMG_T0LO_REG(i) (DR_REG_TIMG_BASE(i) + 0x4) argument 118 #define TIMG_T0HI_REG(i) (DR_REG_TIMG_BASE(i) + 0x8) argument 132 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) argument 144 #define TIMG_T0ALARMLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x10) argument 156 #define TIMG_T0ALARMHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x14) argument 170 #define TIMG_T0LOADLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x18) argument 186 #define TIMG_T0LOADHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x1c) argument 202 #define TIMG_T0LOAD_REG(i) (DR_REG_TIMG_BASE(i) + 0x20) argument [all …]
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/hal_espressif-latest/components/soc/esp32c6/include/soc/ |
D | twai_reg.h | 17 #define TWAI_MODE_REG(i) (REG_TWAI_BASE(i) + 0x0) argument 60 #define TWAI_CMD_REG(i) (REG_TWAI_BASE(i) + 0x4) argument 102 #define TWAI_STATUS_REG(i) (REG_TWAI_BASE(i) + 0x8) argument 179 #define TWAI_INTERRUPT_REG(i) (REG_TWAI_BASE(i) + 0xc) argument 251 #define TWAI_INTERRUPT_ENABLE_REG(i) (REG_TWAI_BASE(i) + 0x10) argument 321 #define TWAI_BUS_TIMING_0_REG(i) (REG_TWAI_BASE(i) + 0x18) argument 344 #define TWAI_BUS_TIMING_1_REG(i) (REG_TWAI_BASE(i) + 0x1c) argument 373 #define TWAI_ARB_LOST_CAP_REG(i) (REG_TWAI_BASE(i) + 0x2c) argument 385 #define TWAI_ERR_CODE_CAP_REG(i) (REG_TWAI_BASE(i) + 0x30) argument 411 #define TWAI_ERR_WARNING_LIMIT_REG(i) (REG_TWAI_BASE(i) + 0x34) argument [all …]
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D | timer_group_reg.h | 41 #define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0) argument 98 #define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x4) argument 111 #define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x8) argument 124 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) argument 136 #define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x10) argument 148 #define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x14) argument 160 #define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x18) argument 173 #define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x1c) argument 186 #define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x20) argument 199 #define TIMG_WDTCONFIG0_REG(i) (REG_TIMG_BASE(i) + 0x48) argument [all …]
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/hal_espressif-latest/components/bt/esp_ble_mesh/mesh_core/ |
D | settings_uid.c | 45 int i; in get_core_settings_handle() local 47 for (i = 0; i < ARRAY_SIZE(user_ids); i++) { in get_core_settings_handle() 48 if (user_ids[i].open) { in get_core_settings_handle() 49 return user_ids[i].handle; in get_core_settings_handle() 59 int i; in settings_uid_init() local 61 for (i = 0; i < ARRAY_SIZE(user_ids); i++) { in settings_uid_init() 62 memset(&user_ids[i], 0, sizeof(struct settings_uid)); in settings_uid_init() 63 user_ids[i].handle = INVALID_SETTINGS_HANDLE; in settings_uid_init() 76 int i; in settings_uid_load() local 89 for (i = 0; i < length / SETTINGS_ITEM_SIZE; i++) { in settings_uid_load() [all …]
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D | provisioner_main.c | 158 int i; in bt_mesh_provisioner_main_reset() local 160 for (i = 0; i < ARRAY_SIZE(bt_mesh.p_sub); i++) { in bt_mesh_provisioner_main_reset() 161 if (bt_mesh.p_sub[i]) { in bt_mesh_provisioner_main_reset() 162 bt_mesh_provisioner_local_net_key_del(bt_mesh.p_sub[i]->net_idx, erase); in bt_mesh_provisioner_main_reset() 181 for (i = 0; i < CONFIG_BLE_MESH_MAX_PROV_NODES; i++) { in bt_mesh_provisioner_main_reset() 182 provisioner_remove_node(i, erase); in bt_mesh_provisioner_main_reset() 203 int i; in bt_mesh_provisioner_check_is_addr_dup() local 220 for (i = 0; i < ARRAY_SIZE(mesh_nodes); i++) { in bt_mesh_provisioner_check_is_addr_dup() 221 node = mesh_nodes[i]; in bt_mesh_provisioner_check_is_addr_dup() 258 int i; in provisioner_store_node() local [all …]
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/hal_espressif-latest/components/esp_psram/esp32/ |
D | esp_himem.c | 124 for (int i = 0; i < s_ramblockcnt; i++) { in esp_himem_get_free_size() local 125 if (!s_ram_descriptor[i].is_alloced) ret+=CACHE_BLOCKSIZE; in esp_himem_get_free_size() 170 for (int i = 0; i < s_ramblockcnt && n != count; i++) { in allocate_blocks() local 171 if (!s_ram_descriptor[i].is_alloced) { in allocate_blocks() 172 blocks_out[n] = i; in allocate_blocks() 178 for (int i = 0; i < count; i++) { in allocate_blocks() local 179 s_ram_descriptor[blocks_out[i]].is_alloced = true; in allocate_blocks() 180 assert(s_ram_descriptor[blocks_out[i]].is_mapped == false); in allocate_blocks() 224 for (int i = 0; i < handle->block_ct; i++) { in esp_himem_free() local 225 assert(ramblock_idx_valid(handle->block[i])); in esp_himem_free() [all …]
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/hal_espressif-latest/components/soc/esp32c2/include/soc/ |
D | timer_group_reg.h | 14 #define DR_REG_TIMG_BASE(i) REG_TIMG_BASE(i) argument 38 #define TIMG_T0CONFIG_REG(i) (DR_REG_TIMG_BASE(i) + 0x0) argument 95 #define TIMG_T0LO_REG(i) (DR_REG_TIMG_BASE(i) + 0x4) argument 108 #define TIMG_T0HI_REG(i) (DR_REG_TIMG_BASE(i) + 0x8) argument 121 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) argument 133 #define TIMG_T0ALARMLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x10) argument 145 #define TIMG_T0ALARMHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x14) argument 157 #define TIMG_T0LOADLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x18) argument 170 #define TIMG_T0LOADHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x1c) argument 183 #define TIMG_T0LOAD_REG(i) (DR_REG_TIMG_BASE(i) + 0x20) argument [all …]
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/hal_espressif-latest/components/soc/esp32c3/include/soc/ |
D | timer_group_reg.h | 14 #define DR_REG_TIMG_BASE(i) REG_TIMG_BASE(i) argument 38 #define TIMG_T0CONFIG_REG(i) (DR_REG_TIMG_BASE(i) + 0x0) argument 95 #define TIMG_T0LO_REG(i) (DR_REG_TIMG_BASE(i) + 0x4) argument 108 #define TIMG_T0HI_REG(i) (DR_REG_TIMG_BASE(i) + 0x8) argument 121 #define TIMG_T0UPDATE_REG(i) (DR_REG_TIMG_BASE(i) + 0xc) argument 133 #define TIMG_T0ALARMLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x10) argument 145 #define TIMG_T0ALARMHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x14) argument 157 #define TIMG_T0LOADLO_REG(i) (DR_REG_TIMG_BASE(i) + 0x18) argument 170 #define TIMG_T0LOADHI_REG(i) (DR_REG_TIMG_BASE(i) + 0x1c) argument 183 #define TIMG_T0LOAD_REG(i) (DR_REG_TIMG_BASE(i) + 0x20) argument [all …]
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/hal_espressif-latest/components/soc/esp32h2/include/soc/ |
D | timer_group_reg.h | 41 #define TIMG_T0CONFIG_REG(i) (REG_TIMG_BASE(i) + 0x0) argument 98 #define TIMG_T0LO_REG(i) (REG_TIMG_BASE(i) + 0x4) argument 111 #define TIMG_T0HI_REG(i) (REG_TIMG_BASE(i) + 0x8) argument 124 #define TIMG_T0UPDATE_REG(i) (REG_TIMG_BASE(i) + 0xc) argument 136 #define TIMG_T0ALARMLO_REG(i) (REG_TIMG_BASE(i) + 0x10) argument 148 #define TIMG_T0ALARMHI_REG(i) (REG_TIMG_BASE(i) + 0x14) argument 160 #define TIMG_T0LOADLO_REG(i) (REG_TIMG_BASE(i) + 0x18) argument 173 #define TIMG_T0LOADHI_REG(i) (REG_TIMG_BASE(i) + 0x1c) argument 186 #define TIMG_T0LOAD_REG(i) (REG_TIMG_BASE(i) + 0x20) argument 199 #define TIMG_WDTCONFIG0_REG(i) (REG_TIMG_BASE(i) + 0x48) argument [all …]
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/hal_espressif-latest/components/mbedtls/port/sha/parallel_engine/ |
D | esp_sha256.c | 50 #define GET_UINT32_BE(n,b,i) \ argument 52 (n) = ( (uint32_t) (b)[(i) ] << 24 ) \ 53 | ( (uint32_t) (b)[(i) + 1] << 16 ) \ 54 | ( (uint32_t) (b)[(i) + 2] << 8 ) \ 55 | ( (uint32_t) (b)[(i) + 3] ); \ 60 #define PUT_UINT32_BE(n,b,i) \ argument 62 (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ 63 (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ 64 (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ 65 (b)[(i) + 3] = (unsigned char) ( (n) ); \ [all …]
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/hal_espressif-latest/components/newlib/ |
D | poll.c | 36 for (unsigned int i = 0; i < nfds; ++i) { in poll() local 37 fds[i].revents = 0; in poll() 39 if (fds[i].fd < 0) { in poll() 44 if (fds[i].fd >= FD_SETSIZE) { in poll() 45 fds[i].revents |= POLLNVAL; in poll() 50 if (fds[i].events & (POLLIN | POLLRDNORM | POLLRDBAND | POLLPRI)) { in poll() 51 FD_SET(fds[i].fd, &readfds); in poll() 52 FD_SET(fds[i].fd, &errorfds); in poll() 53 max_fd = MAX(max_fd, fds[i].fd); in poll() 56 if (fds[i].events & (POLLOUT | POLLWRNORM | POLLWRBAND)) { in poll() [all …]
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