Searched refs:SPI_CMD_REG (Results 1 – 13 of 13) sorted by relevance
| /hal_espressif-latest/tools/esptool_py/flasher_stub/ |
| D | stub_write_flash.c | 82 WRITE_REG(SPI_CMD_REG, SPI_FLASH_RDSR); in spiflash_is_ready()
83 while(READ_REG(SPI_CMD_REG) != 0) in spiflash_is_ready()
93 WRITE_REG(SPI_CMD_REG, SPI_FLASH_WREN); in spi_write_enable()
94 while(READ_REG(SPI_CMD_REG) != 0) in spi_write_enable()
302 WRITE_REG(SPI_CMD_REG, command); in start_next_erase()
303 while(READ_REG(SPI_CMD_REG) != 0) { } in start_next_erase()
309 WRITE_REG(SPI_CMD_REG, command); in start_next_erase()
310 while(READ_REG(SPI_CMD_REG) != 0) { } in start_next_erase()
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| /hal_espressif-latest/components/esp_rom/patches/ |
| D | esp_rom_spiflash.c | 94 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WREN); in esp_rom_spiflash_clear_bp()
95 while (REG_READ(SPI_CMD_REG(SPI_IDX)) != 0) { in esp_rom_spiflash_clear_bp()
101 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WRDI); in esp_rom_spiflash_clear_bp()
102 while (REG_READ(SPI_CMD_REG(SPI_IDX)) != 0) { in esp_rom_spiflash_clear_bp()
687 REG_WRITE(SPI_CMD_REG(SPI_IDX), SPI_FLASH_WRDI); in esp_rom_spiflash_write_disable()
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| /hal_espressif-latest/components/esp_rom/include/esp32/rom/ |
| D | spi_flash.h | 50 #define PERIPHS_SPI_FLASH_CMD SPI_CMD_REG(1)
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| /hal_espressif-latest/components/esp_psram/esp32/ |
| D | esp_psram_impl_quad.c | 300 SET_PERI_REG_MASK(SPI_CMD_REG(spi_num), SPI_USR); in psram_cmd_recv_start()
301 while ((READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR)); in psram_cmd_recv_start()
329 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_config()
397 while (READ_PERI_REG(SPI_CMD_REG(spi_num)) & SPI_USR); in psram_cmd_end()
997 SET_PERI_REG_MASK(SPI_CMD_REG(PSRAM_SPI_NUM), SPI_FLASH_READ_M); in esp_psram_impl_enable()
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| /hal_espressif-latest/tools/esptool_py/flasher_stub/include/ |
| D | soc_support.h | 250 #define SPI_CMD_REG (SPI_BASE_REG + 0x00) macro
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| /hal_espressif-latest/tools/esptool_py/esptool/ |
| D | loader.py | 1329 SPI_CMD_REG = base + 0x00
1420 self.write_reg(SPI_CMD_REG, SPI_CMD_USR)
1424 if (self.read_reg(SPI_CMD_REG) & SPI_CMD_USR) == 0:
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| /hal_espressif-latest/components/soc/esp32c3/include/soc/ |
| D | spi_reg.h | 15 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32c2/include/soc/ |
| D | spi_reg.h | 15 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32s3/include/soc/ |
| D | spi_reg.h | 23 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32/include/soc/ |
| D | spi_reg.h | 21 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32h2/include/soc/ |
| D | spi_reg.h | 17 #define SPI_CMD_REG (DR_REG_SPI_BASE + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32c6/include/soc/ |
| D | spi_reg.h | 17 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x0) macro
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| /hal_espressif-latest/components/soc/esp32s2/include/soc/ |
| D | spi_reg.h | 15 #define SPI_CMD_REG(i) (REG_SPI_BASE(i) + 0x000) macro
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